DS2740
Table 2. DETAILED PIN DESCRIPTIONS
PIN SYMBOL DESCRIPTION
OVD 1
1-Wire Bus Speed Control. Input logic level selects the speed of the 1-
Wire bus. Logic 1 selects overdrive (OVD) and Logic 0 selects standard
timing (STD). On a multidrop bus, all devices must operate at same
speed.
PIO 2
Programmable I/O Pin. Programmed as input or output through internal
registers. Open-drain output sufficient for LED or vibrator activation.
SNS 3
Current-Sense Resistor Input
IS2 4
Current-Sense Input. Connected to SNS through a 10k resistor to
allow filtering of the current waveform by an external capacitor.
IS1 5
Current-Sense Input. Connected to V
SS
through a 10k resistor to allow
filtering of the current waveform through an external capacitor.
V
SS
6
Device Ground, Current-Sense Resistor Return. Connect directly to
the negative terminal of the battery cell.
DQ 7
Data I/O Pin. Operates bidirectionally with open-drain output driver.
Internal 1µA pulldown aids in sensing pack removal and Sleep-mode
activation.
V
DD
8
Power-Supply Input. Connects to system voltage supply or positive
terminal of battery cell.
Figure 2. APPLICATION EXAMPLE
DS2740
VDD
VSS
DQ
PIO
DATA
2.7V to 5.5V
System Supply
or
Battery Pack Positive
Connectio
n
To
Battery
Negative
SNS
PIO
IS1IS2
104
150
330
R
SNS
104
System
GND
OVD
* *
* 5.6V zener recommended for ESD protection when DATA or PIO
contacts exposed, such as a removable battery pack application
150
4 of 16
DS2740
5 of 16
POWER MODES
The DS2740 has two power modes: Active and Sleep. While in Active mode, the DS2740 operates as a
high-precision coulomb counter with current and accumulated current measurement blocks operating
continuously and the resulting values updated in the measurement registers. Read and write access is
allowed to all registers. PIO pin is active. In Sleep mode, the DS2740 operates in a low-power mode with
no current measurement activity. Serial access to current, accumulated current, and status/control
registers is allowed if V
DD
> 2V.
The DS2740 operating mode transitions from SLEEP to ACTIVE when:
1) DQ > V
IH
, and V
DD
> UV threshold, or
2) V
DD
rises from below UV threshold to above UV threshold.
The DS2740 operating mode transitions from ACTIVE to SLEEP when:
1) V
DD
falls to UV threshold, or
2) SMOD = 1 and DQ < V
IL
for 2s.
CURRENT MEASUREMENT
In the Active mode of operation, the DS2740 continually measures the current flow into and out of the
battery by measuring the voltage drop across a low-value current-sense resistor, R
SNS
. To extend the input
range for pulse-type load currents, the voltage signal can be filtered by adding a capacitor between the
IS1 and IS2 pins. The external capacitor and two internal resistors form a lowpass filter at the input of the
ADC. The voltage-sense range at IS1 and IS2 is ±51.2mV. The input converts peak signal amplitudes up
to 102mV as long as the continuous or average signal level (post filter) does not exceed ±51.2mV over
the conversion cycle period. The ADC samples the input differentially at IS1 and IS2 with an 18.6kHz
sample clock and updates the current register at the completion of each conversion cycle. Conversion
times for each resolution option are listed in the tables below. Two resolution options are available.
Figure 3 describes the current measurement register format and resolution for each option. “S” indicates
the sign bit(s).
Figure 3. CURRENT REGISTER FORMAT
DS2740U: Units: 1.5625μV/R
SNS
, 15-bit + sign resolution, 3.5s conversion period.
DS2740BU: Units: 6.250μV/R
SNS
, 13-bit + sign resolution, 0.875s conversion period.
MSB—Address 0Eh LSB—Address 0Fh
S 2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
MSb LSb MSb LSb
Full-scale magnitude: ±51.2mV
DS2740
6 of 16
CURRENT RESOLUTION (1 LSB)
R
SNS
PART
CONVERSION
TIME
V
IS1
- V
IS2
20mΩ 15mΩ 10mΩ 5mΩ
DS2740U 3.515s
1.5625
μV 78.13μA 104.2μA 156.3μA 312.5μA
DS2740BU 0.878s
6.250
μV 312.5μA 416.7μA 625μA
1.250mA
Every 1024th conversion, the ADC measures its input offset to facilitate offset correction. Offset
correction occurs approximately once per hour in the DS2740U and four times per hour in the
DS2740BU. The resulting correction factor is applied to the subsequent 1023 measurements. During the
offset correction conversion, the ADC does not measure the IS1 to IS2 signal. A maximum error of
1/1024 in the accumulated current register (ACR) is possible, however, to reduce the error, the current
measurement just prior to the offset conversion is displayed in the current register and is substituted for
the dropped current measurement in the current accumulation process. The typical error due to offset
correction is much less than 1/1024.
CURRENT ACCUMULATOR
Current measurements are internally summed, or accumulated, at the completion of each conversion
period with the results displayed in the ACR. The accuracy of the ACR is dependent on both the current
measurement and the conversion timebase. The ACR has a range of ±204.8mVh with a LSb of
6.25μVh
. Additional registers hold fractional results of each accumulation, however, these bits are not
user accessible.
Read and write access is allowed to the ACR. Whenever the ACR is written, fractional accumulation
results are cleared. Also, a write forces the ADC to measure its offset and update the offset correction
factor. The current measurement and accumulation begin with the second conversion following a write to
the ACR. Figure 4 describes the ACR address, format, and resolution.
Figure 4. CURRENT ACCUMULATOR FORMAT
MSB—Address 10h LSB—Address 11h
S 2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
MSb LSb MSb LSb
Units: 6.25
μVh/R
SNS
ACR LSB
R
SNS
PART
UPDATE
INTERVAL
V
IS1
- V
IS2
20mΩ 15mΩ 10mΩ 5mΩ
DS2740U 3.515s
DS2740BU 0.878s
6.25μVh 312.5μAh 416.7μAh 625μAh
1.250mAh

DS2740BU+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Battery Management High-Precision Coulomb Counter
Lifecycle:
New from this manufacturer.
Delivery:
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