NTMD4840NR2G

NTMD4840N
http://onsemi.com
4
TYPICAL PERFORMANCE CURVES
Figure 7. Capacitance Variation Figure 8. GateToSource and
DrainToSource Voltage vs. Total Charge
V
SD
, SOURCETODRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
I
S
, SOURCE CURRENT (AMPS)
V
GS
= 0 V
T
J
= 25°C
Figure 10. Diode Forward Voltage vs. Current
DRAINTOSOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
0510
T
J
= 25°C
C
iss
C
oss
C
rss
15 25
0
600
V
GS
= 0 V
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
Q
G
, TOTAL GATE CHARGE (nC)
V
GS
= 10 V
I
D
= 6.9 A
T
J
= 25°C
V
GS
Q
GS
R
G
, GATE RESISTANCE (OHMS)
t, TIME (ns)
V
DD
= 15 V
I
D
= 1 A
V
GS
= 10 V
t
r
t
d(on)
t
f
t
d(off)
Q
GD
QT
300
T
J
, STARTING JUNCTION TEMPERATURE (°C)
EAS, SINGLE PULSE DRAINTOSOURCE
AVALANCHE ENERGY (mJ)
I
D
= 7.5 A
20
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
V
DS
, DRAINTOSOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
dc
10 ms
1 ms
100 ms
10 ms
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
700
30
1
04
0
4
6
2
3
8
5
8
10
7
9
V
DS
100
1 10 100
1
1
0.4 0.5 0.6 0.7
0
2
2.5
0.8
10
0.01 10 100
1
100
1
0.1
0.01
10
25 50 75 100
0
20
30
150125
10
100
400
500
200
2610
1.5
0.5
5
15
25
15 937
0.1
NTMD4840N
http://onsemi.com
5
PACKAGE DIMENSIONS
SOIC8 NB
CASE 75107
ISSUE AJ
SEATING
PLANE
1
4
58
N
J
X 45
_
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
A
B
S
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
X
Y
G
M
Y
M
0.25 (0.010)
Z
Y
M
0.25 (0.010) Z
S
X
S
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒ
mm
inches
Ǔ
SCALE 6:1
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTMD4840N/D
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NTMD4840NR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
MOSFET NFET SO8 30V 7.5A 0.034R
Lifecycle:
New from this manufacturer.
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