AD7863
Rev. B | Page 18 of 24
ADDRESS
DECODE
EN
ADDRESS BUS
CS
A0
BUSY
RD
DB13
DB0
DATA BUS
AD7863*
*ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
CONVST
06411-021
TMS320C25
A15
A0
IS
INTn
STRB
R/W
DMD15
DMD0
READY
MSC
Figure 21. AD7863 to TMS320C25 Interface
Some applications may require that the conversion be initiated
by the microprocessor rather than an external timer. One
option is to decode the AD7863
CONVST
from the address bus
so that a write operation starts a conversion. Data is read at the
end of the conversion sequence as before.
Figure 23 shows an
example of initiating conversion using this method. Note that
for all interfaces, it is preferred that a read operation not be
attempted during conversion.
AD7863 TO MC68000 INTERFACE
An interface between the AD7863 and the MC68000 is shown
in
Figure 22. As before, conversion can be supplied from the
MC68000 or from an external source. The AD7863 BUSY line
can be used to interrupt the processor or, alternatively, software
delays can ensure that conversion has been completed before a
read to the AD7863 is attempted. Because of the nature of its
interrupts, the MC68000 requires additional logic (not shown
in
Figure 23) to allow it to be interrupted correctly. For further
information on MC68000 interrupts, consult the MC68000
users manual.
The MC68000
AS
and R/
W
outputs are used to generate a
separate
RD
input signal for the AD7863.
CS
is used to drive
the MC68000
DTACK
input to allow the processor to execute
a normal read operation to the AD7863. The conversion results
are read using the following MC68000 instruction:
MOVE.W ADC, D0
where:
D0 is the 68000 D0 register.
ADC is the AD7863 address.
ADDRESS
DECODE
EN
ADDRESS BUS
A15
A0
DTACK
AS
D15
D0
CS
A0
RD
DB13
DB0
DATA BUS
MC68000
AD7863*
*ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
CONVST
06411-022
R/W
Figure 22. AD7863 to MC68000 Interface
AD7863 TO 80C196 INTERFACE
Figure 23 shows an interface between the AD7863 and the
80C196 microprocessor. Here, the microprocessor initiates
conversion. This is achieved by gating the 80C196
WR
signal
with a decoded address output (different from the AD7863
CS
address). The AD7863 BUSY line is used to interrupt the
microprocessor when the conversion sequence is completed.
ADDRESS
DECODE
EN
ADDRESS BUS
A15
A1
D15
D0
CS
A0
BUSY
DB13
DB0
DATA BUS
80C196
AD7863*
*ADDITIONAL PINS OMITTED FOR CLARITY.
06411-023
WR
RD
RD
Figure 23. AD7863–80C196 Interface
VECTOR MOTOR CONTROL
The current drawn by a motor can be split into two components:
one produces torque and the other produces magnetic flux.
For optimal performance of the motor, these two components
should be controlled independently. In conventional methods of
controlling a three-phase motor, the current (or voltage)
supplied to the motor and the frequency of the drive are the
basic control variables. However, both the torque and flux are
functions of current (or voltage) and frequency. This coupling
effect can reduce the performance of the motor because, for
example, if the torque is increased by increasing the frequency,
the flux tends to decrease.
