AD7863
Rev. B | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Ratings
V
DD
to AGND −0.3 V to +7 V
V
DD
to DGND −0.3 V to +7 V
Analog Input Voltage to AGND
AD7863-10 ±17 V
AD7863-3 ±7 V
AD7863-2 7 V
Reference Input Voltage to AGND −0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to DGND −0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to DGND −0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (A Version and B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
SOIC Package, Power Dissipation 450 mW
θ
JA
Thermal Impedance 71.40°C/W
θ
JC
Thermal Impedance 23.0°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
SSOP Package, Power Dissipation 450 mW
θ
JA
Thermal Impedance 109°C/W
θ
JC
Thermal Impedance 39.0°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD7863
Rev. B | Page 7 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DB1
DB2
DB3
DB4
DB5
DB6
CONVST
DB12
DB11
DB10
DB9
DGND
DB7
DB8
V
A2
V
REF
A0
CS
DB13
AGND
V
B1
V
A1
RD
BUSY
V
DD
V
B2
AGND
DB0
06411-004
AD7863
TOP VIEW
(Not to Scale)
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin
No.
Mnemonic Description
1 to 6 DB12 to DB7 Data Bit 12 to Data Bit 7. Three-state TTL outputs.
7 DGND Digital Ground. Ground reference for digital circuitry.
8
CONVST Convert Start Input. Logic input. A high-to-low transition on this input puts both track/holds into their hold mode
and starts conversion on both channels.
9 to 15 DB6 to DB0 Data Bit 6 to Data Bit 0. Three-state TTL outputs.
16 AGND Analog Ground. Ground reference for mux, track/hold, reference, and DAC circuitry.
17 V
B2
Input Number 2 of Channel B. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to
2.5 V (AD7863-2).
18 V
A2
Input Number 2 of Channel A. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to
2.5 V (AD7863-2).
19 V
REF
Reference Input/Output. This pin is connected to the internal reference through a series resistor and is the output
reference source for the analog-to-digital converter. The nominal reference voltage is 2.5 V, and this appears at the pin.
20 A0
Multiplexer Select. This input is used in conjunction with
CONVST to determine on which pair of channels the
conversion is to be performed. If A0 is low when the conversion is initiated, then channels V
A1
and V
A2
are
selected. If A0 is high when the conversion is initiated, channels V
B1
and V
B2
are selected.
21
CS
Chip Select Input. Active low logic input. The device is selected when this input is active.
22
RD Read Input. Active low logic input. This input is used in conjunction with CS low to enable the data outputs and
read a conversion result from the AD7863.
23 BUSY
Busy Output. The busy output is triggered high by the falling edge of
CONVST and remains high until conversion
is completed.
24 V
DD
Analog and Digital Positive Supply Voltage, 5.0 V ± 5%.
25 V
A1
Input Number 1 of Channel A. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to
2.5 V (AD7863-2).
26 V
B1
Input Number 1 of Channel B. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to
2.5 V (AD7863-2).
27 AGND Analog Ground. Ground reference for mux, track/hold, reference, and DAC circuitry.
28 DB13
Data Bit 13 (MSB). Three-state TTL output. Output coding is twos complement for the AD7863-10 and AD7863-3.
Output coding is straight (natural) binary for the AD7863-2.
AD7863
Rev. B | Page 8 of 24
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the analog-to-digital converter. The signal is the rms
amplitude of the fundamental. Noise is the rms sum of all non-
fundamental signals up to half the sampling frequency (f
S
/2),
excluding dc. The ratio is dependent upon the number of
quantization levels in the digitization process; the more levels,
the smaller the quantization noise. The theoretical signal-to-
(noise + distortion) ratio for an ideal N-bit converter with a sine
wave input is given by
Signal to (Noise + Distortion) = (6.02N + 1.76) dB
For a 14-bit converter, this is 86.04 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7863 it is defined as
()
1
5432
V
VVVV
dBTHD
222
log20
+++
=
2
where:
V
1
is the rms amplitude of the fundamental.
V
2
, V
3
, V
4
, and V
5
are the rms amplitudes of the second through
the fifth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
parts where the harmonics are buried in the noise floor, it is
a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities creates distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3. Intermodulation terms are those for which
neither m nor n is equal to zero. For example, the second order
terms include (fa + fb) and (fa − fb), and the third order terms
include (2fa + fb), (2fa − fb), (fa + 2fb), and (fa − 2fb).
The AD7863 is tested using two input frequencies. In this case,
the second and third order terms are of different significance.
The second order terms are usually distanced in frequency from
the original sine waves, and the third order terms are usually at
a frequency close to the input frequencies. As a result, the
second and third order terms are specified separately. The
calculation of the intermodulation distortion is as per the THD
specification where it is the ratio of the rms sum of the
individual distortion products to the rms amplitude of the
fundamental, expressed in decibels (dB).
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale 50 kHz sine wave signal to all nonselected channels and
determining how much that signal is attenuated in the selected
channel. The figure given is the worst case across all channels.
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Positive Gain Error (AD7863-10, ±10 V, AD7863-3, ±2.5 V)
This is the deviation of the last code transition (01 . . . 110 to
01 . . . 111) from the ideal 4 × V
REF
− 1 LSB (AD7863-10, ±10 V
range) or V
REF
− 1 LSB (AD7863-3, ±2.5 V range), after the
bipolar offset error has been adjusted out.
Positive Gain Error (AD7863-2, 0 V to 2.5 V)
This is the deviation of the last code transition (11 . . . 110 to
11 . . . 111) from the ideal V
REF
− 1 LSB, after the unipolar offset
error has been adjusted out.
Bipolar Zero Error (AD7863-10, ±10 V, AD7863-3, ±2.5 V)
This is the deviation of the midscale transition (all 0s to all 1s)
from the ideal 0 V (AGND).
Unipolar Offset Error (AD7863-2, 0 V to 2.5 V)
This is the deviation of the first code transition (00 . . . 000 to
00 . . . 001) from the ideal AGND + 1 LSB.
Negative Gain Error (AD7863-10, ±10 V, AD7863-3, ±2.5 V)
This is the deviation of the first code transition (10 . . . 000 to
10 . . . 001) from the ideal −4 × V
REF
+ 1 LSB (AD7863-10, ±10 V
range) or –V
REF
+ 1 LSB (AD7863-3, ±2.5 V range), after bipolar
zero error has been adjusted out.
Track-and-Hold Acquisition Time
Track-and-hold acquisition time is the time required for the
output of the track/hold amplifier to reach its final value, with
±½ LSB, after the end of conversion (the point at which the
track-and-hold returns to track mode). It also applies to
situations where a change in the selected input channel takes
place or where there is a step input change on the input voltage
applied to the selected V
AX/BX
input of the AD7863. It means
that the user must wait for the duration of the track-and-hold
acquisition time after the end of conversion or after a channel
change/step input change to V
AX/BX
before starting another
conversion, to ensure that the part operates to specification.

AD7863ARS-3REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Simult Sampling Dual 175 kSPS 14-Bit
Lifecycle:
New from this manufacturer.
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