MAX8545/MAX8546/MAX8548
Low-Cost, Wide Input Range, Step-Down
Controllers with Foldback Current Limit
10 ______________________________________________________________________________________
MAX8545*
MAX8546
MAX8548*
BSTV
CC
COMP/
EN
VLV
IN
DH
LX
DL
GND
FB
+2.7V TO
+5.5V INPUT
OUT
1.8V/3A OR 6A
D2 R2
C10 C11
C1
C5
D1
Q1
L1
R4
R3
C6
C3 C2C4
C7 C8
*FOLLOW THE DATA SHEET DESIGN PROCEDURE TO SELECT THE
EXTERNAL COMPONENTS FOR THE MAX8545/MAX8548.
R1
C9
Figure 1. Typical Application Circuit (2.7V to 5V) Input (see Tables 1a, 1b)
MAX8545*
MAX8546
MAX8548*
BST
V
IN
COMP/
EN
VLV
CC
DH
LX
DL
GND
FB
+10V TO
+24V INPUT
OUT
2.5V/3A OR 6A
D2 R2
C10 C11
C1
C12
C9
C5
D1
Q1
R1
L1
R4
R3
C6
C3 C2C4
C7 C8
*FOLLOW THE DATA SHEET DESIGN PROCEDURE TO SELECT THE
EXTERNAL COMPONENTS FOR THE MAX8545/MAX8548.
Figure 2. Typical Application Circuit (10V to 24V) Input (see Tables 2a, 2b)
MAX8545/MAX8546/MAX8548
Low-Cost, Wide Input Range, Step-Down
Controllers with Foldback Current Limit
______________________________________________________________________________________ 11
A limitation of sensing current across a MOSFET’s on-
resistance is that the current-limit threshold is not accu-
rate since MOSFET R
DS(ON)
specifications are not
precise. This type of current limit provides a coarse level
of fault protection. It is especially suited when the input
source is already current-limited or otherwise protected.
Power MOSFET Selection
The MAX8545/MAX8546/MAX8548 drive two external,
logic-level, n-channel MOSFETs as the circuit switching
elements. The key selection parameters are:
1) On-resistance (R
DS(ON)
): the lower, the better.
2) Maximum drain-to-source voltage (V
DSS
) should be
at least 10% higher than the input supply rail at the
high-side MOSFET’s drain.
3) Gate charges (Q
G
, Q
GD
, Q
GS
): the lower, the better.
Choose the MOSFETs with rated R
DS(ON)
at V
GS
= 4.5V
for an input voltage greater than 5V, and at V
GS
= 2.5V
for an input voltage less than 5.5V. For a good compro-
mise between efficiency and cost, choose the high-side
MOSFET (N1) that has conduction losses equal to the
switching losses at nominal input voltage and maximum
output current. For N2, make sure it does not spuriously
turn on due to a dV/dt caused by N1 turning on as this
would result in shoot-through current degrading the
efficiency. MOSFETs with a lower Q
GD
/Q
GS
ratio have
higher immunity to dV/dt.
MOSFET Power Dissipation
For proper thermal-management design, the power dis-
sipation must be calculated at the desired maximum
operating junction temperature, maximum output cur-
rent, and worst-case input voltage (for the low-side
MOSFET (N2) the worst case is at V
IN(MAX)
, for the high-
side MOSFET (N1) the worst case can be either at
V
IN(MIN)
or V
IN(MAX)
). N1 and N2 have different loss
components due to the circuit operation. N2 operates as
a zero-voltage switch; therefore, the major losses are:
the channel conduction loss (P
N2CC
), the body-diode
conduction loss (P
N2DC
), and the gate-drive loss
(P
N2DR
):
Use R
DS(ON)
at T
J(MAX)
:
where V
F
is the body-diode forward voltage drop, t
dt
is
the dead time between N1 and N2 switching transitions
(which is 30ns), and f
S
is the switching frequency.
Because of zero-voltage switch operation, the N2 gate-
drive losses are due to charging and discharging the
input capacitor, C
ISS
. These losses are distributed
between the average DL gate driver’s pullup and pull-
down resistors and the internal gate resistance. The
R
DL
is typically 1.8Ω, and the internal gate resistance
(R
GATE
) of the MOSFET is typically 2Ω. The drive
power dissipated in N2 is given by:
N1 operates as a duty-cycle control switch and has the
following major losses: the channel conduction loss
(P
N1CC
), the voltage and current overlapping switching
loss (P
N1SW
), and the drive loss (P
N1DR
). N1 does not
have a body-diode conduction loss because the diode
never conducts current:
Use R
DS(ON)
at T
J(MAX)
:
where I
GATE
is the average DH high driver output-cur-
rent capability determined by:
where R
DH
is the high-side MOSFET driver’s average
on-resistance (2.05Ω typ) and R
GATE
is the internal
gate resistance of the MOSFET (2Ω typ):
where V
GS
~ VL.
In addition to the losses above, allow about 20% more
for additional losses due to MOSFET output capaci-
tance and N2 body-diode reverse recovery charge dis-
sipated in N1. Refer to the MOSFET data sheet for
thermal resistance specifications to calculate the PC
board area needed. This information is essential to
maintain the desired maximum operating junction tem-
perature with the above calculated power dissipation.
To reduce EMI caused by switching noise, add a 0.1µF
ceramic capacitor from the high-side MOSFET drain to
the low-side MOSFET source or add resistors in series
PQVf
R
RR
NDR GS GS S
GATE
DH GATE
1
××
+
I
VL
RR
GATE ON
DH GATE
()
+
1
2
PVI f
QQ
I
N SW IN LOAD S
GS GD
GATE
1
××
+
P
V
V
IR
NCC
OUT
IN
LOAD DS ON1
2
=
×
()
×
()
PCVf
R
RR
N DR ISS GS S
GATE
GATE DL
2
2
()
××
+
PIVtf
N DC LOAD F dt S2
2 × × ×
P
V
V
IR
NCC
OUT
IN
LOAD
DS ON2
2
1=
××
()
MAX8545/MAX8546/MAX8548
Low-Cost, Wide Input Range, Step-Down
Controllers with Foldback Current Limit
12 ______________________________________________________________________________________
with DH and DL to slow down the switching transitions.
However, adding series resistors increases the power
dissipation of the MOSFET, so ensure temperature rat-
ings of the MOSFET are not exceeded.
Input-Capacitor Selection
The input capacitors (C2 and C3 in Figure 1) reduce
noise injection and current peaks drawn from the input
supply. The input capacitor must meet the ripple-cur-
rent requirement (I
RMS
) imposed by the switching cur-
rents. The RMS input ripple current is given by:
For optimal circuit reliability, choose a capacitor that
has less than 10°C temperature rise at the RMS current.
I
RMS
is maximum when the input voltage equals 2 x
V
OUT
, where I
RMS
= 1/2 I
LOAD
.
Output Capacitor Selection
The key parameters for the output capacitor are the
actual capacitance value, the equivalent series resis-
tance (ESR), the equivalent series inductance (ESL),
and the voltage-rating requirements. All these parame-
ters affect the overall stability, output ripple voltage,
and transient response.
The output ripple has three components: variations in the
charge stored in the output capacitor, the voltage drop
across the ESR, and the voltage drop across the ESL.
V
RIPPLE
= V
RIPPLE(ESR)
+ V
RIPPLE(C)
+ V
RIPPLE(ESL)
The output voltage ripple as a consequence of the ESR
and output capacitance is:
where I
P-P
is the peak-to-peak inductor current (see the
Inductor Selection section).
While these equations are suitable for initial capacitor
selection to meet the ripple requirement, final values
may also depend on the relationship between the LC
double-pole frequency and the capacitor ESR-zero fre-
quency. Generally, the ESR zero is higher than the LC
double pole; however, it is preferable to keep the ESR
zero close to the LC double pole when possible to
negate the sharp phase shift of the typically high-Q
double LC pole (see the Compensation Design sec-
tion). Aluminum electrolytic or POS capacitors are rec-
ommended. Higher output current requires multiple
capacitors to meet the output ripple voltage.
The MAX8545/MAX8546/MAX8548s’ response to a load
transient depends on the selected output capacitor. After
a load transient, the output instantly changes by (ESR x
ΔI
LOAD
) + (ESL x dI/dt). Before the controller can
respond, the output deviates further depending on the
inductor and output capacitor values. After a short period
of time (see the Typical Operating Characteristics), the
controller responds by regulating the output voltage back
to its nominal state. The controller response time
depends on the closed-loop bandwidth. Higher band-
width results in faster response time, preventing the out-
put voltage from further deviation. Do not exceed the
capacitor’s voltage or ripple-current ratings.
Boost Diode and Capacitor Selection
A low-current Schottky diode, such as the CMPSH-3
from Central Semiconductor, works well for most appli-
cations. Do not use large power diodes since higher
junction capacitance can charge up BST to LX voltage
that could exceed the device rating of 6V. The boost
capacitor should be in the range of 0.1µF to 0.47µF,
depending on the specific input and output voltages
and the external components and PCB layout. The
boost capacitance needs to be as large as possible to
prevent it from charging to excessive voltage, but small
enough to adequately charge during the minimum low-
side MOSFET conduction time, which happens at the
maximum operating duty cycle (this occurs at the mini-
mum input voltage). In addition, ensure the boost
capacitor does not discharge to below the minimum
gate-to-source voltage required to keep the high-side
MOSFET fully enhanced for lowest on-resistance. This
minimum gate-to-source voltage V
GS(MIN)
is deter-
mined by:
where Q
G
is the total gate charge of the high-side
MOSFET and C
BOOST
is the boost capacitor value.
Compensation Design
The MAX8545/MAX8546/MAX8548 use a voltage-mode
control scheme that regulates the output voltage. This is
done by comparing the error amplifier’s output (COMP) to
a fixed internal ramp. The inductor and output capacitor
create a double pole at the resonant frequency, which
VV
Q
C
GS MIN L
G
BOOST
()
=
V I ESR
V
I
Cf
V
V ESL
L ESL
I
VV
fL
V
V
RIPPLE ESR P P
RIPPLE C
PP
OUT SW
RIPPLE ESL
IN
PP
IN OUT
SW
OUT
IN
()
()
()
=
××
=
×
+
=
×
8
II
VVV
V
RMS LOAD
OUT IN OUT
IN
×
()

MAX8546EUB+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Controllers Wide Input Range Step-Down Controller
Lifecycle:
New from this manufacturer.
Delivery:
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