9
FN6830.0
December 19, 2008
Detailed Description of Operation
ISL6174 targets dual voltage hot-swap applications with a
bias of 2.1V to 3.6VDC and the voltages being controlled
down to 0.7VDC. The IC’s main functions are to control start-
up inrush current and provide circuit breaker protection of
the sourcing supplies from OC loads. This is achieved by
enhancing an external MOSFET in a controlled manner. In
order to fully enhance the MOSFET, the IC must provide
adequate gate to source voltage, which is typically 5V or
greater. Hence, the final steady-state voltage on Gate (GT)
pin must be a minimum of 5V above the load voltage. Two
internal charge-pumps allow this to happen.
Controlled Soft-Start
The output voltages are monitored through the Vo pins and
slew up at a rate determined by the capacitors on the
Soft-start (SS) pin, as illustrated in Figure 15. 24µA of gate
charge current is available. The soft-start amplifier controls
the output voltage by robbing some of the gate charge
current thus slowing down the MOSFET enhancement.
When the load voltage reaches its set level, as sensed by its
respective UV pin through an external resistor divider, the
Power Good (PG
) output goes active.
Current Monitoring and Circuit Breaker Protection
The IC monitors the load current (Io) by sensing the
voltage-drop across the low value current sense resistor
(R
SNS
), which is connected in series with the MOSFET (as
shown in the “Block Diagram” on page 2), through Sense
(SNS) and voltage set (VS) pins. The latter is through a
resistor, R
SET
, as shown. Two levels of overcurrent
detection are available to protect against all possible fault
scenarios. These levels are:
• Timed Circuit Breaker (CB)
• Way Overcurrent Circuit Breaker (WOC)
Each of these modes is described in detail as follows:
TIMED CIRCUIT BREAKER (CB) MODE
When the load current reaches the Circuit Breaker threshold
(I
CB
) the ISL6174 enters the timed Circuit Breaker Mode.
When the circuit enters this mode, the OC comparator which
directly looks at the voltage drop across R
SNS
detects it and
starts the CB delay timer. TCB begins to charge whatever
capacitance is on that pin from an internal 10µA current
source. The amount of time it takes for this capacitance to
charge to ~1.18V (V
CT_Vth
) sets up the Circuit Breaker delay.
Upon expiration of the CB delay (t
CB
), the MOSFET gate is
pulled down quickly.
If during and prior to t
CB
expiring the load current falls below
I
CB
then in that case, the Circuit Breaker mode is no longer
active and the IC discharges the C
TCB
cap.
The Circuit Breaker threshold (I
CB
) is set by sinking a
reference current, I
SET
, through R
SET
by selecting an
appropriate resistor between OCREF and GND, which sets
I
REF
. The relationship between I
REF
and I
SET
is I
REF
=
4*I
SET
, where I
REF
= Vocref/Rocref = 1.178/Rocref. I
REF
would typically be set at 80µA. This I
SET
* R
SET
voltage is
then compared to the voltage across a load current series
sense low ohmic resistor.
Selecting appropriate values for R
SET
and R
SNS
such that
when I
O
= I
CR
,
WAY OVERCURRENT CIRCUIT BREAKER (WOC) MODE
This mode is designed to handle very fast, very low
impedance shorts on the load side, which can result in very
high di/dt transients on the input current. The WOC circuit
breaker level is typically 200% of the Circuit Breaker limit. In
this mode the comparator, which directly looks at the voltage
drop across R
SNS
and once the WOC level is exceeded the
IC pulls the gate very quickly to GND, the SSx capacitor is
discharged, FLT
is asserted and a new SS sequence is
allowed to begin after ENx
recycle.
Q
SS1
G
T
1
V
O
1
10V
CPVDD
SOFT-
START
AMPLIFIER
24µA
10µA
+
42µA
VO
0
0
VIN
CPVDD
VIN
+
-
-
FIGURE 15. SOFT-START OPERATION
(EQ. 1)
Io*R
SNS
= I
SET
*R
SET
ISL6174
