1
®
FN6227.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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ISL22416
Single Digitally Controlled Potentiometer (XDCP™)
Low Noise, Low Power, SPI
®
Bus, 128 Taps
The ISL22416 integrates a single digitally controlled
potentiometer (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wiper is controlled by the user through the SPI
serial interface. The potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up, the device recalls the contents of the
DCP’s IVR to the WR.
The DCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
128 resistor taps
SPI serial interface
Non-volatile storage of wiper position
Wiper resistance: 70 typical @ V
CC
= 3.3V
Shutdown mode
Shutdown current 5µA max
Power supply: 2.7V to 5.5V
•50kor 10k total resistance
High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T +55°C
10 Ld MSOP and 10 Ld TDFN package
Pb-free (RoHS compliant)
Pinout
ISL22416
(10 LD MSOP)
TOP VIEW
ISL22416
(10 LD TDFN)
TOP VIEW
1
2
3
4
5
6
10
9
8
7
SDO
SHDN
CS
SDI
VCCSCK
GND
RL
RW
RH
SDO
SHDN
CS
SDI
VCCSCK
GND
RL
RW
RH
1
2
3
4
5
6
10
9
8
7
O
Ordering Information
PART NUMBER
(Note) PART MARKING
RESISTANCE OPTION
(k)
TEMP. RANGE
(°C)
PACKAGE
(Pb-free) PKG. DWG. #
ISL22416UFU10Z* 416UZ 50 -40 to +125 10 Ld MSOP M10.118
ISL22416UFRT10Z* 416U 50 -40 to +125 10 Ld 3x3 TDFN L10.3x3B
ISL22416WFU10Z* 416WZ 10 -40 to +125 10 Ld MSOP M10.118
ISL22416WFRT10Z* 416W 10 -40 to +125 10 Ld 3x3 TDFN L10.3x3B
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Data Sheet September 9, 2009
N
O
T
R
E
C
O
M
M
E
N
D
E
D
F
O
R
N
E
W
D
E
S
I
G
N
S
P
O
S
S
I
B
L
E
S
U
B
S
T
I
T
U
T
E
P
R
O
D
U
C
T
I
S
L
2
2
3
1
6
2
FN6227.2
September 9, 2009
Block Diagram
SPI
INTERFACE
V
CC
RH
GND
RL
RW
SCK
SDO
SDI
CS
IVR
WR
SHDN
NON-VOLATILE
REGISTER
POWER-UP
INTERFACE,
CONTROL
AND
STATUS
LOGIC
Pin Descriptions
MSOP/TDFN PIN NUMBER SYMBOL DESCRIPTION
1 SCK SPI interface clock input
2 SDO Push-pull/Open Drain Data Output of the SPI serial interface
3 SDI Data Input of the SPI serial interface
4CS
Chip Select active low input
5 SHDN Shutdown active low input
6 GND Device ground pin
7 RL “Low” terminal of DCP
8 RW “Wiper” terminal of DCP
9 RH “High” terminal of DCP
10 V
CC
Power supply pin
ISL22416
3
FN6227.2
September 9, 2009
Absolute Maximum Ratings Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP pin with Respect to GND . . . . . . . -0.3V to V
CC
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 1) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5kV
Charge Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1kV
Thermal Resistance (Typical)
JA
(°C/W)
JC
( ° C / W )
10 Lead MSOP (Note 2). . . . . . . . . . . . 162 N/A
10 Lead TDFN (Notes 2, 3) . . . . . . . . . 74 7
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±3.0mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -1V for all pins.
2.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Analog Specifications Over recommended operating conditions, unless otherwise stated. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested.
SYMBOL PARAMETER TEST CONDITIONS MIN
TYP
(Note 4) MAX UNIT
R
TOTAL
R
H
to R
L
Resistance W option 10 k
U option 50 k
R
H
to R
L
Resistance Tolerance W and U option -20 +20 %
End-to-End Temperature Coefficient W option ±50 ppm/°C
(Note 18)
U option ±80 ppm/°C
(Note 18)
R
W
Wiper Resistance V
CC
= 3.3V, wiper current = V
CC
/R
TOTAL
70 200
V
RH
, V
RL
V
RH
and V
RL
Terminal Voltages V
RH
and V
RL
to GND 0 V
CC
V
C
H
/C
L
/C
W
(Note 18)
Potentiometer Capacitance 10/10/25 pF
I
LkgDCP
Leakage on DCP Pins Voltage at pin from GND to V
CC
0.1 1 µA
VOLTAGE DIVIDER MODE (0V @ R
L
; V
CC
@ R
H
; measured at R
W
, unloaded)
INL
(Note 9)
Integral Non-linearity Monotonic over all tap positions, W and U
option
-1 1 LSB
(Note 5)
DNL
(Note 8)
Differential Non-linearity Monotonic over all tap positions, W and U
option
-0.5 0.5 LSB
(Note 5)
ZSerror
(Note 6)
Zero-scale Error W option 0 1 5 LSB
(Note 5)
U option 0 0.5 2
FSerror
(Note 7)
Full-scale Error W option -5 -1 0 LSB
(Note 5)
U option -2 -1 0
TC
V
(Note 10, 18)
Ratiometric Temperature Coefficient DCP register set to 40 hex for W and U
option
±4 ppm/°C
ISL22416

ISL22416UFRT10Z

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs 128 TAP FL RNG DCP 10LD
Lifecycle:
New from this manufacturer.
Delivery:
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