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ISL22416UFRT10Z

P1-P3P4-P6P7-P9P10-P12P13-P14
4
FN6227.2
September 9, 2009
RESISTOR MODE (Measurements between R
W
and R
L
with R
H
not connected, or between R
W
and R
H
with R
L
not connected)
RINL
(Note 14)
Integral Non-linearity DCP register set between 10 hex and 7F
hex; monotonic over all tap positions;
W and U option
-1 1 MI
(Note 11)
RDNL
(Note 13)
Differential Non-linearity W option -1 1 MI
(Note 11)
U option -0.5 0.5 MI
(Note 11)
Roffset
(Note 12)
Offset W option 0 1 5 MI
(Note 11)
U option 0 0.5 2 MI
(Note 11)
Analog Specifications Over recommended operating conditions, unless otherwise stated. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested. (Continued)
SYMBOL PARAMETER TEST CONDITIONS MIN
TYP
(Note 4) MAX UNIT
Operating Specifications Over the recommended operating conditions, unless otherwise specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
SYMBOL PARAMETER TEST CONDITIONS MIN
TYP
(Note 4) MAX UNIT
I
CC1
V
CC
Supply Current (Volatile
Write/Read)
f
SCK
= 5MHz; (for SPI Active, Read and
Volatile Write states only)
0.5 mA
I
CC2
V
CC
Supply Current (Non-volatile
Write/Read)
f
SCK
= 5MHz; (for SPI Active, Read and
Non-volatile Write states only)
3mA
I
SB
V
CC
Current (Standby) V
CC
= +5.5V @ +85°C, SPI interface in
standby state
5µA
V
CC
= +5.5V @ +125°C, SPI interface in
standby state
7µA
V
CC
= +3.6V @ +85°C, SPI interface in
standby state
3µA
V
CC
= +3.6V @ +125°C, SPI interface in
standby state
5µA
I
SD
V
CC
Current (Shutdown) V
CC
= +5.5V @ +85°C, SPI interface in
standby state
3µA
V
CC
= +5.5V @ +125°C, SPI interface in
standby state
5µA
V
CC
= +3.6V @ +85°C, SPI interface in
standby state
2µA
V
CC
= +3.6V @ +125°C, SPI interface in
standby state
4µA
I
LkgDig
Leakage Current, at Pins SHDN, SCK,
SDI, SDO and CS
Voltage at pin from GND to V
CC,
SDO is inactive
-1 1 µA
t
WRT
(Note 18)
Wiper Response Time Wiper Response Time after SPI write to WR
register
1.5 µs
t
ShdnRec
(Note 18)
DCP Recall Time from Shutdown
Mode
From rising edge of SHDN
signal to wiper
stored position and RH connection
1.5 µs
SCK rising edge of last bit of ACR data byte
to wiper stored position and RH connection
1.5 µs
V
POR
Power-on Recall Voltage Minimum V
CC
at which memory recall occurs 2.0 2.6 V
V
CC
Ramp V
CC
Ramp Rate 0.2 V/ms
ISL22416
5
FN6227.2
September 9, 2009
NOTES:
4. Typical values are for T
A
= +25°C and 3.3V supply voltage.
5. LSB: [V(R
W
)
127
– V(R
W
)
0
]/127. V(R
W
)
127
and V(R
W
)
0
are V(R
W
) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
6. ZS error = V(RW)
0
/LSB.
7. FS error = [V(RW)
127
– V
CC
]/LSB.
t
D
Power-up Delay V
CC
above V
POR
, to DCP Initial Value
Register recall completed, and SPI Interface
in standby state
3ms
EEPROM SPECIFICATION
EEPROM Endurance 1,000,000 Cycles
EEPROM Retention Temperature T +55°C 50 Years
t
WC
(Note 16)
Non-volatile Write Cycle Time 12 20 ms
SERIAL INTERFACE SPECIFICATIONS
V
IL
SHDN, SCK, SDI, and CS Input Buffer
LOW Voltage
-0.3 0.3*V
CC
V
V
IH
SHDN, SCK, SDI, and CS Input Buffer
HIGH Voltage
0.7*V
CC
V
CC
+ 0.3 V
Hysteresis
SHDN, SCK, SDI, and CS Input Buffer
Hysteresis
0.05*
V
CC
V
V
OL
SDO Output Buffer LOW Voltage I
OL
= 4mA 0 0.4 V
R
pu
(Note 17)
SDO Pull-up Resistor Off-chip Maximum is determined by t
RO
and t
FO
with
maximum bus load Cb = 30pF, f
SCK
= 5MHz
2k
Cpin
(Note 18)
SHDN
, SCK, SDI, SDO and CS Pin
Capacitance
10 pF
f
SCK
SPI Frequency 5MHz
t
CYC
SPI Clock Cycle Time 200 ns
t
WH
SPI Clock High Time 100 ns
t
WL
SPI Clock Low Time 100 ns
t
LEAD
Lead Time 250 ns
t
LAG
Lag Time 250 ns
t
SU
SDI, SCK and CS Input Setup Time 50 ns
t
H
SDI, SCK and CS Input Hold Time 50 ns
t
RI
SDI, SCK and CS Input Rise Time 10 ns
t
FI
SDI, SCK and CS Input Fall Time 10 20 ns
t
DIS
SDO Output Disable Time 0 100 ns
t
V
SDO Output Valid Time 350 ns
t
HO
SDO Output Hold Time 0 ns
t
RO
SDO Output Rise Time R
pu
= 2k, Cbus = 30pF 60 ns
t
FO
SDO Output Fall Time R
pu
= 2k, Cbus = 30pF 60 ns
t
CS
CS Deselect Time 2µs
Operating Specifications Over the recommended operating conditions, unless otherwise specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested. (Continued)
SYMBOL PARAMETER TEST CONDITIONS MIN
TYP
(Note 4) MAX UNIT
ISL22416
6
FN6227.2
September 9, 2009
NOTES: (Continued)
8. DNL = [V(RW)
i
– V(RW)
i-1
]/LSB-1, for i = 1 to 127. i is the DCP register setting.
9. INL = [V(RW)
i
– (i • LSB) – V(RW)
0
]/LSB for i = 1 to 127
10. for i = 16 to 127 decimal, T = -40°C to 125°C. Max( ) is the maximum value of the wiper
voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.
11. MI =
|RW
127
– RW
0
|/127. MI is a minimum increment. RW
127
and RW
0
are the measured resistances for the DCP register set to 7F hex and
00 hex respectively.
12. Roffset = RW
0
/MI, when measuring between RW and RL.
Roffset = RW
127
/MI, when measuring between RW and RH.
13. RDNL = (RW
i
– RW
i-1
)/MI -1, for i = 1 to 127.
14. RINL = [RW
i
– (MI • i) – RW
0
]/MI, for i = 1 to 127.
15. for i = 16 to 127, T = -40°C to 125°C. Max( ) is the maximum value of the resistance and Min ( ) is
the minimum value of the resistance over the temperature range.
16. t
WC
is the time from the end of a Write sequence of SPI serial interface, to the end of the self-timed internal non-volatile write cycle.
17. R
pu
is specified for the highest data rate transfer for the device. Higher value pull-up can be used at lower data rates.
18. Limits should be considered typical and are not production tested.
Timing Diagrams
Input Timing
Output Timing
TC
V
Max V RW
i
Min V RW
i
–
Max V RW
i
Min V RW
i
+2
----------------------------------------------------------------------------------------------
10
6
+165°C
---------------------
=
TC
R
Max RiMin Ri–
Max RiMin Ri+2
----------------------------------------------------------------
10
6
165°C
-----------------
=
...
CS
SCK
SDI
SDO
MSB LSB
HIGH IMPEDANCE
t
LEAD
t
H
t
SU
t
FI
t
CS
t
LAG
t
CYC
t
WL
...
t
RI
t
WH
...
CS
SCK
SDO
SDI
ADDR
MSB
LSB
t
DIS
t
HO
t
V
...
ISL22416
P1-P3P4-P6P7-P9P10-P12P13-P14

ISL22416UFRT10Z

Mfr. #:
Buy ISL22416UFRT10Z
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs 128 TAP FL RNG DCP 10LD
Lifecycle:
New from this manufacturer.
Delivery:
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