MPC9456
MOTOROLA TIMING SOLUTIONS4
Table 6: DC Characteristics (V
CC
= V
CCA
= V
CCB
= V
CCC
= 3.3V ± 5%, T
A
= –40 to +85°C)
Symbol Characteristics Min Typ Max Unit Condition
V
IH
Input high voltage 2.0 V
CC
+ 0.3 V LVCMOS
V
IL
Input low voltage -0.3 0.8 V LVCMOS
V
PP
Peak-to-peak input voltage PCLK 250 mV LVPECL
V
CMR
a Common Mode Range PCLK 1.1 V
CC
-0.6 V LVPECL
I
IN
Input current
b
200 µA V
IN
=GND or V
IN
=V
CC
V
OH
Output High Voltage 2.4 V I
OH
=-24 mA
c
V
OL
Output Low Voltage 0.55
0.30
V
V
I
OL
= 24mA
b
I
OL
= 12mA
Z
OUT
Output impedance 14 - 17
I
CCQ
d Maximum Quiescent Supply Current 2.0 mA All V
CC
Pins
a. V
CMR
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
CMR
range
and the input swing lies within the V
PP
(DC) specification.
b. Input pull-up / pull-down resistors influence input current.
c. The MPC9456 is capable of driving 50transmission lines on the incident edge. Each output drives one 50 parallel terminated
transmission line to a termination voltage of V
TT
. Alternatively, the device drives up to two 50 series terminated transmission lines.
d. I
CCQ
is the DC current consumption of the device with all outputs open and the input in its default state or open.
Table 7: AC Characteristics (V
CC
= V
CCA
= V
CCB
= V
CCC
= 3.3V ± 5%, T
A
= –40 to +85°C)
a
Symbol Characteristics Min Typ Max Unit Condition
f
ref
Input Frequency 0 250
b
MHz
f
MAX
Maximum Output Frequency ÷1 output
÷2 output
0
0
250
b
125
MHz
MHz
FSELx=0
FSELx=1
V
PP
Peak-to-peak input voltage PCLK 500 1000 mV LVPECL
V
CMR
c Common Mode Range PCLK 1.3 V
CC
-0.8 V LVPECL
t
P,
REF
Reference Input Pulse Width 1.4 ns
t
r
, t
f
PCLK Input Rise/Fall Time 1.0
d
ns 0.8 to 2.0V
t
PLH
t
PHL
Propagation delay CCLK to any Q
CCLK to any Q
2.2
2.2
2.8
2.8
4.45
4.2
ns
ns
t
PLZ,
HZ
Output Disable Time 10 ns
t
PZL,
LZ
Output Enable Time 10 ns
t
sk(O)
Output-to-output Skew Within one bank
Any output bank, same output divider
Any output, Any output divider
150
200
350
ps
ps
ps
t
sk(PP)
Device-to-device Skew
2.25
ns
t
SK(P)
DC
Q
Output pulse skew
e
Output Duty Cycle ÷1 output
÷2 output
47
45
50
50
200
53
55
ps
%
%
DC
REF
= 50%
DC
REF
= 25%-75%
t
r
, t
f
Output Rise/Fall Time 0.1 1.0 ns 0.55 to 2.4V
a. AC characteristics apply for parallel output termination of 50 to V
TT
.
b. The MPC9456 is functional up to an input and output clock frequency of 350 MHz and is characterized up to 250 MHz.
c. V
CMR
(AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V
CMR
range
and the input swing lies within the V
PP
(AC) specification.
d. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input
pulse width, output duty cycle and maximum frequency specifications.
e. Output pulse skew is the absolute difference of the propagation delay times: | t
pLH
- t
pHL
|.
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cale Semiconductor,
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MPC9456
TIMING SOLUTIONS 5 MOTOROLA
Table 8: DC Characteristics (V
CC
= V
CCA
= V
CCB
= V
CCC
= 2.5V ± 5%, T
A
= –40 to +85°C)
Symbol Characteristics Min Typ Max Unit Condition
V
IH
Input high voltage 1.7 V
CC
+ 0.3 V LVCMOS
V
IL
Input low voltage -0.3 0.7 V LVCMOS
V
PP
Peak-to-peak input voltage PCLK 250 mV LVPECL
V
CMR
a Common Mode Range PCLK 1.1 V
CC
-0.7 V LVPECL
V
OH
Output High Voltage 1.8 V I
OH
=-15 mA
b
V
OL
Output Low Voltage 0.6 V I
OL
= 15 mA
Z
OUT
Output impedance 17 - 20
b
I
IN
Input current
c
±200 µA V
IN
=GND or V
IN
=V
CC
I
CCQ
d Maximum Quiescent Supply Current 2.0 mA All V
CC
Pins
a. V
CMR
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
CMR
range
and the input swing lies within the V
PP
(DC) specification.
b. The MPC9456 is capable of driving 50transmission lines on the incident edge. Each output drives one 50 parallel terminated
transmission line to a termination voltage of V
TT
. Alternatively, the device drives up to two 50 series terminated transmission lines per
output.
c. Input pull-up / pull-down resistors influence input current.
d. ICCQ is the DC current consumption of the device with all outputs open and the input in its default state or open.
Table 9: AC Characteristics (V
CC
= V
CCA
= V
CCB
= V
CCC
= 2.5V ± 5%, T
A
= –40 to +85°C)
a
Symbol Characteristics Min Typ Max Unit Condition
f
ref
Input Frequency 0 250
b
MHz
f
MAX
Maximum Output Frequency ÷1 output
÷2 output
0
0
250
b
125
MHz
MHz
FSELx=0
FSELx=1
V
PP
Peak-to-peak input voltage PCLK 500 1000 mV LVPECL
V
CMR
c Common Mode Range PCLK 1.1 V
CC
-0.7 V LVPECL
t
P,
REF
Reference Input Pulse Width 1.4 ns
t
r
, t
f
PCLK Input Rise/Fall Time 1.0
d
ns 0.7 to 1.7V
t
PLH
t
PHL
Propagation delay PCLK to any Q
PCLK to any Q
2.6
2.6
5.6
5.5
ns
ns
t
PLZ,
HZ
Output Disable Time 10 ns
t
PZL,
LZ
Output Enable Time 10 ns
t
sk(O)
Output-to-output Skew Within one bank
Any output bank, same output divider
Any output, Any output divider
150
200
350
ps
ps
ps
t
sk(PP)
Device-to-device Skew
3.0
ns
t
SK(P)
DC
Q
Output pulse skew
e
Output Duty Cycle ÷1 or ÷2 output
45 50
200
55
ps
%
DC
REF
= 50%
t
r
, t
f
Output Rise/Fall Time 0.1 1.0 ns 0.6 to 1.8V
a. AC characteristics apply for parallel output termination of 50 to V
TT
.
b. The MPC9456 is functional up to an input and output clock frequency of 350 MHz and is characterized up to 250 MHz.
c. V
CMR
(AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V
CMR
range
and the input swing lies within the V
PP
(AC) specification.
d. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input
pulse width, output duty cycle and maximum frequency specifications.
e. Output pulse skew is the absolute difference of the propagation delay times: | t
pLH
- t
pHL
|.
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cale Semiconductor,
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Freescale Semiconductor, Inc.
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MPC9456
MOTOROLA TIMING SOLUTIONS6
Table 10: AC Characteristics (V
CC
= 3.3V ± 5%, V
CCA
= V
CCB
= V
CCC
= 2.5V ± 5% or 3.3V ± 5%,
T
A
= –40 to +85°C)
a
b
Symbol Characteristics Min Typ Max Unit Condition
t
sk(O)
Output-to-output Skew Within one bank
Any output bank, same output divider
Any output, Any output divider
150
250
350
ps
ps
ps
t
sk(PP)
Device-to-device Skew
2.5
ns
t
PLH,HL
Propagation delay PCLK to any Q See 3.3V table
t
SK(P)
DC
Q
Output pulse skew
c
Output Duty Cycle ÷1 or ÷2 output
45 50
250
55
ps
%
DC
REF
= 50%
a. AC characteristics apply for parallel output termination of 50 to V
TT
.
b. For all other AC specifications, refer to 2.5V or 3.3V tables according to the supply voltage of the output bank.
c. Output pulse skew is the absolute difference of the propagation delay times: | t
pLH
- t
pHL
|.
Frees
cale Semiconductor,
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...

MPC9456FA

Mfr. #:
Manufacturer:
NXP / Freescale
Description:
Clock Buffer 2.5 3.3V 250MHz Clock Generator
Lifecycle:
New from this manufacturer.
Delivery:
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