74LVC273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 31 December 2012 3 of 17
NXP Semiconductors
74LVC273
Octal D-type flip-flop with reset; positive-edge trigger
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3. Pin configuration for SO20 and (T)SSOP20 Fig 4. Pin configuration for DHVQFN20
273
MR V
CC
Q0 Q7
D0 D7
D1 D6
Q1 Q6
Q2 Q5
D2 D5
D3 D4
Q3 Q4
GND CP
001aad093
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
001aad094
273
Transparent top view
Q4
D3
Q3
D4
D2 D5
Q2 Q5
Q1 Q6
GND
(1)
D1 D6
D0 D7
Q0 Q7
GND
CP
MR
V
CC
9
12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10
11
1
20
terminal 1
index area
Table 2. Pin description
Symbol Pin Description
MR
1 master reset input (active LOW)
CP 11 clock input (LOW-to-HIGH; edge-triggered)
D[0:7] 3, 4, 7, 8, 13, 14, 17, 18 data input
Q[0:7] 2, 5, 6, 9, 12, 15, 16, 19 flip-flop output
GND 10 ground (0 V)
V
CC
20 supply voltage
74LVC273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 31 December 2012 4 of 17
NXP Semiconductors
74LVC273
Octal D-type flip-flop with reset; positive-edge trigger
6. Functional description
[1] H = HIGH voltage level
L = LOW voltage level
X = don’t care
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition
= LOW-to-HIGH clock transition
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO20 packages: above 70 C the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 C the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C the value of P
tot
derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 3. Function table
[1]
Operating mode Input Output
MR CP Dn Qn
Reset (clear) LXXL
Load ‘1’ H hH
Load ‘0’ H lL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +6.5 V
I
IK
input clamping current V
I
< 0 V 50 - mA
V
I
input voltage
[1]
0.5 +6.5 V
I
OK
output clamping current V
O
> V
CC
or V
O
< 0 V - 50 mA
V
O
output voltage
[2]
0.5 V
CC
+ 0.5 V
I
O
output current V
O
= 0 V to V
CC
- 50 mA
I
CC
supply current - 100 mA
I
GND
ground current 100 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[3]
- 500 mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 1.65 - 3.6 V
functional 1.2 - - V
V
I
input voltage 0 - 5.5 V
V
O
output voltage 0 - V
CC
V
74LVC273 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 31 December 2012 5 of 17
NXP Semiconductors
74LVC273
Octal D-type flip-flop with reset; positive-edge trigger
9. Static characteristics
[1] All typical values are measured at V
CC
= 3.3 V (unless stated otherwise) and T
amb
=25C.
T
amb
ambient temperature in free air 40 - +125 C
t/V input transition rise and fall
rate
V
CC
= 1.65 V to 2.7 V 0 - 20 ns/V
V
CC
= 2.7 V to 3.6 V 0 - 10 ns/V
Table 5. Recommended operating conditions
…continued
Symbol Parameter Conditions Min Typ Max Unit
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
V
IH
HIGH-level
input voltage
V
CC
= 1.2 V 1.08 - - 1.08 - V
V
CC
= 1.65 V to 1.95 V 0.65 V
CC
- - 0.65 V
CC
-V
V
CC
= 2.3 V to 2.7 V 1.7 - - 1.7 - V
V
CC
= 2.7 V to 3.6 V 2.0 - - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 1.2 V - - 0.12 - 0.12 V
V
CC
= 1.65 V to 1.95 V - - 0.35 V
CC
-0.35 V
CC
V
V
CC
= 2.3 V to 2.7 V - - 0.7 - 0.7 V
V
CC
= 2.7 V to 3.6 V - - 0.8 - 0.8 V
V
OH
HIGH-level
output
voltage
V
I
=V
IH
or V
IL
I
O
= 100 A;
V
CC
=1.65Vto3.6V
V
CC
0.2 - - V
CC
0.3 - V
I
O
= 4mA; V
CC
= 1.65 V 1.2 - - 1.05 - V
I
O
= 8mA; V
CC
= 2.3 V 1.8 - - 1.65 - V
I
O
= 12 mA; V
CC
= 2.7 V 2.2 - - 2.05 - V
I
O
= 18 mA; V
CC
= 3.0 V 2.4 - - 2.25 - V
I
O
= 24 mA; V
CC
= 3.0 V 2.2 - - 2.0 - V
V
OL
LOW-level
output
voltage
V
I
=V
IH
or V
IL
I
O
= 100 A;
V
CC
= 1.65 V to 3.6 V
- - 0.2 - 0.3 V
I
O
=4mA; V
CC
= 1.65 V - - 0.45 - 0.65 V
I
O
=8mA; V
CC
= 2.3 V - - 0.6 - 0.8 V
I
O
=12mA; V
CC
= 2.7 V - - 0.4 - 0.6 V
I
O
=24mA; V
CC
= 3.0 V - - 0.55 - 0.8 V
I
I
input leakage
current
V
CC
= 3.6 V; V
I
=5.5VorGND - 0.1 5- 20 A
I
CC
supply
current
V
CC
= 3.6 V; V
I
=V
CC
or GND;
I
O
=0A
-0.110-40A
I
CC
additional
supply
current
per input pin;
V
CC
= 2.7 V to 3.6 V;
V
I
=V
CC
0.6 V; I
O
=0A
- 5 500 - 5000 A
C
I
input
capacitance
V
CC
= 0 V to 3.6 V;
V
I
=GNDtoV
CC
-5.0---pF

74LVC273PW/AUJ

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Flip Flops Octal Dtype flipflop positive-edgetrigge
Lifecycle:
New from this manufacturer.
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