GU128X64-800B
3
6. Description of Bus and Signals
This module has serial and 2 types of parallel interface.
Type of interface can be selected by jumper settings. Refer to 11 on page # 18 for details.
6.1 Parallel Interface
Data Line Function
D0 D7
Data Bus (Input / Output)
WR (R/W) Parallel #1: Write Signal, Parallel #2: R/W (Input)
RD (ENCK) Parallel #1: Read Signal, Parallel #2: ENCK (Input)
CSS
Chip Select (Input)
C/D Command / Data Select Signal (Input)
C/D = "1" Command C/D = "0" Data
FRP
Frame Pulse Signal (Output)
RESET
RESET="0" Reset (Input)
Vcc Power Supply
GND Ground
6.2 Serial Interface
Data Line Function
RXD Serial Input
TXD Serial Output
SCK
Clock (Input)
CSS Chip Select (Input)
C/D Command / Data Select Signal (Input)
C/D = "1" Command C/D = "0" Data
FRP Frame Pulse Signal (Output)
RESET
RESET="0" Reset (Input) Active Low
Vcc Power Supply
GND Ground
7. Block Diagram
D0
D7
RD(ENCK)
WR(R/W)
C/D
CSS
FRP
Parallel
Controller
Graphic
RAM
Protection
Circuit
Display Data
Writing Signal
Operation
Detection Signal
Scan Control
Detection Signal
BD-VFD
Vcc
GND
DC/DC
Converter
Filament(AC)
Anode & Grid(DC)
Serial
C/D
SCK
RXD
TXD
(
)
:
P
ara
l
l
e
l
#
2
CSS
RESET
FRP
RESET
GU128X64-800B
4
8. Display Screen and Initialize Set
The Display screen consists of 8,192 dots arranged as 128 by 64 dots. It is divided into 64 display area blocks of 16 by
8 dots each. Each display area block can be assigned to GRAM (Graphic mode) or DDRAM (Character mode) by the
Display Area Set command. (9.5 Page #10)
But, this is the version which has no Font ROM. Therefore, DDRAM is not available, all of display area block must
be assigned to GRAM as the initialize setting, and this must be done when the module is powered up and also
every time the reset is applied, because all display area blocks are set to DDRAM area as default setting.
Initialize sequence is as follows;
C/D=1
  
5FHex
n=0
C/D=1
  
62Hex
C/D=1
  
0nHex
C/D=0
  
FFHex
n=n+1
n=8?
NO
YES
END
Wait 1mS
Display Clear
Initialize Set Start
Data Write
GU128X64-800B
5
8.1 Graphic Display (GRAM)
GRAM consists of 16,384 bits arranged in 128 by 128 bit blocks with access is structured as 8 bits
of vertical data. The detail of GRAM is as follows:
GRAM Data Write Position Address
0H
1H
2H
3H
0H
1H
2H
3H
4H
5H
6H
7H
Y-Address
X-Address
00
・・・・・・ ・・・・・・・・ ・・・・・・・・ ・・・・・・・・
7FH
D0
D1
D2
D3
D4
D5
D6
D7
GRAM Data Write
Position Address
(0H - FH)
1
2
8
b
i
t
6
4
b
i
t
8H
9H
AH
BH
CH
DH
EH
FH
128bit

GU128X64-800B

Mfr. #:
Manufacturer:
Noritake
Description:
Vacuum Fluorescent Displays - VFD Vacuum Fluorescent Dislay Module
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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