The first bits (MSBs) of the MAX7310 slave address are
always zero. Slave address bits AD2, AD1, and AD0
choose 1 of 56 slave ID addresses (Table 7).
Registers
The register address byte is the first byte to follow the
address byte during a read/write transmission. The reg-
ister address byte acts as a pointer to determine which
register is written or read.
The input port register is a read-only port. It reflects the
incoming logic levels of the I/O ports, regardless of
whether the pin is defined as an input or an output by
the configuration register. Writes to the input port regis-
ter are ignored.
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
_______________________________________________________________________________________ 7
SDA
SCL
DATA LINE STABLE; DATA VALID
CHANGE OF DATA ALLOWED
Figure 4. Bit Transfer
Figure 6. Slave Address
SCL
SDA
0 A2 A1 A0 ACK
MSB LSB
FIXED PROGRAMMABLE
A5 A4 A3
R/W
SCL
SDA
BY TRANSMITTER
CLOCK PULSE FOR ACKNOWLEDGMENT
START CONDITION
SDA
BY RECEIVER
12 89
S
Figure 5. Acknowledge
MAX7310
The output port register sets the outgoing logic levels of
the I/O ports, defined as outputs by the configuration
register. Reads from the output port register reflect the
value that is in the flip-flop controlling the output selec-
tion, not the actual I/O value, which may differ if the out-
put is overloaded.
The polarity inversion register enables polarity inversion
of ports defined as inputs by the configuration register.
Set the bit in the polarity inversion register (write with a
1) to invert the corresponding port pin’s polarity. Clear
the bit in the polarity inversion register (write with a
zero) to retain the corresponding port pin’s original
polarity.
The configuration register configures the directions of
the ports. Set the bit in the configuration register to
enable the corresponding port pin as an input with a
high-impedance output driver. Clear the bit in the con-
figuration register to enable the corresponding port pin
as an output.
Set bit T0 to enable the bus timeout function and low to
disable the bus timeout function. Enabling the timeout
feature resets the serial bus interface when SCL stops
either high or low during a read or write access to the
MAX7310. If either SCL or SDA is low for more than
30ms min and 60ms max after the start of a valid serial
transfer, the interface resets itself. Resetting the serial
bus interface sets up SDA as an input. The MAX7310
then waits for another start condition.
Standby
The MAX7310 goes into standby when all pins are set
to V+ or GND. Standby supply current is typically
1.7µA.
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
8 _______________________________________________________________________________________
Table 3. Register 1—Output Port Register
BIT O7 O6 O5 O4 O3 O2 O1 O0
Default 0 0 0 0 0 0 0 0
Table 4. Register 2—Polarity Inversion Register
BIT I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
Default 1 1 1 10000
Table 5. Register 3—Configuration Register
BIT I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
Default 1 1 1 11111
Table 6. Register 4—Timeout Register
BIT T7 T6 T5 T4 T3 T2 T1 T0
Default x x x x x x x 1
Table 1. Register Address
REGISTER
ADDRESS
(hex)
FUNCTION PROTOCOL
0x00 Input port register Read byte.
0x01 Output port register Read/write byte.
0x02
Polarity inversion
register
Read/write byte.
0x03
Configuration
register
Read/write byte.
0x04 Timeout register Read/write byte.
0xFF Reserved register
Factory reserved.
Do not write to this
register.
Table 2. Register 0—Input Port Register
BIT I7 I6 I5 I4 I3 I2 I1 I0
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
_______________________________________________________________________________________ 9
Table 7. MAX7310 Address Map
AD2 AD1 AD0 A6 A5 A4 A3 A2 A1 A0
GNDSCLGND0001000
GNDSCLV+0001001
GNDSDAGND0001010
GNDSDAV+0001011
V+SCLGND0001100
V+SCLV+0001101
V+SDAGND0001110
V+SDAV+0001111
GNDGNDSCL0010000
GNDGNDSDA0010001
GNDV+SCL0010010
GNDV+SDA0010011
V+GNDSCL0010100
V+GNDSDA0010101
V+V+SCL0010110
V+V+SDA0010111
GND GND GND 0 0 1 1 0 0 0
GNDGNDV+0011001
GNDV+GND0011010
GNDV+V+0011011
V+GNDGND0011100
V+GNDV+0011101
V+V+GND0011110
V+V+V+0011111
SCL SCL SCL 0 1 0 0 0 0 0
SCLSCLSDA0100001
SCLSDASCL0100010
SCLSDASDA0100011
SDASCLSCL0100100
SDASCLSDA0100101
SDASDASCL0100110
SDA SDA SDA 0 1 0 0 1 1 1
SCLSCLGND0101000
SCLSCLV+0101001
SCLSDAGND0101010
SCLSDAV+0101011
SDASCLGND0101100
SDASCLV+0101101
SDASDAGND0101110
SDASDAV+0101111

MAX7310ATE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - I/O Expanders 8-Bit I/O Port Expander
Lifecycle:
New from this manufacturer.
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