1. General description
The 74LV245 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC245 and 74HCT245.
The 74LV245 is an octal transceiver with non-inverting 3-state bus compatible outputs in
both send and receive directions. A send/receive (DIR) input controls direction, and an
output enable (OE) input makes easy cascading possible. Pin OE controls the outputs so
that the buses are effectively isolated.
2. Features
n Wide operating voltage: 1.0 V to 5.5 V
n Optimized for low voltage applications: 1.0 V to 3.6 V
n Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
n Typical output ground bounce < 0.8 V at V
CC
= 3.3 V and T
amb
= 25 °C
n Typical HIGH-level output voltage (V
OH
) undershoot: > 2 V at V
CC
= 3.3 V and
T
amb
=25°C
n ESD protection:
u HBM JESD22-A114E exceeds 2000 V
u MM JESD22-A115-A exceeds 200 V
n Multiple package options
n Specified from −40 °Cto+85°C and from −40 °C to +125 °C
3. Ordering information
74LV245
Octal bus transceiver; 3-state
Rev. 03 — 15 April 2009 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LV245N −40 °C to +125 °C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74LV245D −40 °C to +125 °C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74LV245DB −40 °C to +125 °C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
74LV245PW −40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
