74ALVC162334A_3 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 13 December 2006 10 of 19
NXP Semiconductors
74ALVC162334A
16-bit registered driver (3-state)
[1] All typical values are measured at T
amb
=25°C.
[2] 3-state output enable time.
[3] 3-state output disable time.
[1] All typical values are measured at V
CC
= 3.3 V, T
amb
=25°C.
[2] 3-state output enable time.
[3] 3-state output disable time.
t
w
pulse width CP HIGH or LOW; Figure 8 3.3 1.2 - ns
LE HIGH; Figure 6 3.3 0.6 - ns
t
su
set-up time An to CP; Figure 9 1.0 - - ns
An to
LE; Figure 7 1.5 - - ns
t
h
hold time An to CP; Figure 9 0.6 0.3 - ns
An to
LE; Figure 7 1.7 0.4 - ns
f
max
maximum input clock frequency Figure 8 150 190 - MHz
Table 9. Dynamic characteristics for V
CC
= 2.7 V
…continued
V
CC
= 2.7 V; GND = 0 V; t
r
=t
f
≤
2.5 ns; C
L
= 50 pF (see Figure 11).
Symbol Parameter Conditions Min Typ
[1]
Max Unit
Table 10. Dynamic characteristics for V
CC
= 3.0 V to 3.6 V range
V
CC
= 3.3 V
±
0.3 V; GND = 0 V; t
r
=t
f
≤
2.5 ns; C
L
= 50 pF (see Figure 11).
Symbol Parameter Conditions Min Typ
[1]
Max Unit
t
PHL
HIGH-to-LOW propagation delay An to Yn; Figure 5 1.0 2.8 4.3 ns
LE to Yn; Figure 6 1.3 2.8 4.4 ns
CP to Yn;
Figure 8 1.4 3.2 4.9 ns
t
PLH
LOW-to-HIGH propagation delay An to Yn; Figure 5 1.0 2.8 4.3 ns
LE to Yn; Figure 6 1.3 2.8 4.4 ns
CP to Yn;
Figure 8 1.4 3.2 4.9 ns
t
PZH
OFF-state to HIGH propagation delay OE to Yn; Figure 10
[2]
1.1 2.4 4.5 ns
t
PZL
OFF-state to LOW propagation delay OE to Yn; Figure 10
[2]
1.1 2.4 4.5 ns
t
PHZ
HIGH to OFF-state propagation delay OE to Yn; Figure 10
[3]
1.3 2.4 4.8 ns
t
PLZ
LOW to OFF-state propagation delay OE to Yn; Figure 10
[3]
1.3 2.4 4.8 ns
t
w
pulse width CP HIGH or LOW; Figure 8 3.3 0.7 - ns
LE HIGH; Figure 6 3.3 0.6 - ns
t
su
set-up time An to CP; Figure 9 1.0 - - ns
An to
LE; Figure 7 1.5 - - ns
t
h
hold time An to CP; Figure 9 0.9 0.3 - ns
An to
LE; Figure 7 1.4 0.4 - ns
f
max
maximum input clock frequency Figure 8 150 240 - MHz
