ESD8040
www.onsemi.com
8
Figure 17. HDMI Layout Diagram
SCL
5V
CEC
D0-
GND
CLK+
D2+
GND
D2−
D1+
GND
D1−
D0+
GND
D0−
CLK+
GND
CLK−
CEC
N/C (or HEC_DAT)
SCL
SDA
GND
5V
HPD (and HEC_DAT)
ESD8040
HDMI Type−A
Connector
Top layer
Other layer
Pin Description
I/O pins 1, 2, 4, 5, 7, 8, 10, and 11 are to be used for high
speed differential TMDS lines whereas I/O pins 3, 6, 9, 13,
15, and 17 are to be used for lower speed lines (I
2
C, CEC,
HPD, etc.). The ESD8040 was designed specifically for the
HDMI application. The I/O pins for TMDS lines have a
lower breakdown voltage and faster turn−on in the low
current region in order to better protect the sensitive low
voltage, high−speed TMDS signals. The I/O pins for lower
speed lines have a higher breakdown voltage to
accommodate the higher voltages associated with the HPD,
CEC, I
2
C and V
CC
lines as well as the optional Ethernet pin
that can be implemented in HDMI1.4/2.0 applications.
