LPC2101_02_03_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 2 June 2009 25 of 37
NXP Semiconductors
LPC2101/02/03
Single-chip 16-bit/32-bit microcontrollers
[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages.
[2] Core and internal rail.
[3] External rail.
[4] If V
DD(3V3)
< 3.0 V, the I/O pins are not 5 V tolerant, and the ADC input voltage is limited to V
DDA
= 3.0 V.
[5] If V
DDA
< 3.0 V, the I/O pins are not 5 V tolerant.
[6] The RTC typically fails when V
i(VBAT)
drops below 1.6 V.
[7] Including voltage on outputs in 3-state mode.
[8] V
DD(3V3)
supply voltages must be present.
[9] 3-state outputs go into 3-state mode when V
DD(3V3)
is grounded.
[10] Accounts for 100 mV voltage drop in all supply lines.
[11] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[12] Minimum condition for V
I
= 4.5 V, maximum condition for V
I
= 5.5 V. V
DDA
≥ 3.0 V and V
DD(3V3)
≥ 3.0 V.
[13] Applies to P0.25:16.
[14] Battery supply current on pin VBAT.
[15] Input leakage current to V
SS
.
[1] Conditions: V
SSA
=0V, V
DDA
= 3.3 V and V
DD(3V3)
= 3.3 V for 10-bit resolution at full speed; V
DDA
= 2.6 V, V
DD(3V3)
= 2.6 V for 8-bit
resolution at full speed.
[2] The ADC is monotonic, there are no missing codes.
[3] The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See Figure 5.
[4] The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 5.
[5] The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 5.
[6] The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 5.
[7] The absolute error (E
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated ADC
and the ideal transfer curve. See Figure 5.
V
o(XTAL2)
output voltage on
pin XTAL2
0 - 1.8 V
V
i(RTCX1)
input voltage on pin
RTCX1
0 - 1.8 V
V
o(RTCX2)
output voltage on
pin RTCX2
0 - 1.8 V
Table 5. Static characteristics
…continued
T
amb
=
−
40
°
C to +85
°
C for commercial applications, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
Table 6. ADC static characteristics
V
DDA
= 2.5 V to 3.6 V; T
amb
=
−
40
°
C to +85
°
C unless otherwise specified. ADC frequency 4.5 MHz.
Symbol Parameter Conditions Min Typ Max Unit
V
IA
analog input voltage 0 - V
DDA
V
C
ia
analog input capacitance - - 1 pF
E
D
differential linearity error
[1][2][3]
--±1 LSB
E
L(adj)
integral non-linearity
[1][4]
--±2 LSB
E
O
offset error
[1][5]
--±3 LSB
E
G
gain error
[1][6]
--±0.5 %
E
T
absolute error
[1][7]
--±4 LSB