ADuM5200/ADuM5201/ADuM5202 Data Sheet
Rev. B | Page 16 of 28
07540-014
TIME (µs)
0 0.5 1.0
25
20
15
10
5
0
–5
1.5 2.0 2.5 3.0 3.5 4.0
5V OUTPUT RIPPLE (mV)
BW = 20MHz
Figure 15. Typical Output Voltage Ripple at 90% Load, V
ISO
= 5 V
07540-015
TIME (µs)
0 0.5 1.0
16
14
12
10
8
6
4
2
0
1.5 2.0 2.5 3.0 3.5 4.0
3.3V OUTPUT RIPPLE (mV)
BW = 20MHz
Figure 16. Typical Output Voltage Ripple at 90% Load, V
ISO
= 3.3 V
07540-027
TIME (ms)
V
ISO
(V)
7
6
5
4
3
2
1
0
–1 0 1 2 3
90% LOAD
10% LOAD
Figure 17. Typical Output Voltage Start-Up Transient
at 10% and 90% Load, V
ISO
= 5 V
07540-028
TIME (ms)
V
ISO
(V)
5
4
3
2
1
0
–1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0
90% LOAD
10% LOAD
Figure 18. Typical Output Voltage Start-Up Transient
at 10% and 90% Load, V
ISO
= 3.3 V
0
4
8
12
16
20
0 5 10 15
DATA RATE (Mbps)
SUPPLY CURRENT (mA)
20 25
07540-025
5V INPUT/5V OUTPUT
3.3V INPUT/3.3V OUTPUT
5V INPUT/3.3V OUTPUT
Figure 19. Typical I
CHn
Supply Current per Forward Data Channel
(15 pF Output Load)
0
4
8
12
16
20
0 5 10 15
DATA RATE (Mbps)
SUPPLY CURRENT (mA)
20 25
5V INPUT/5V OUTPUT
3.3V INPUT/3.3V OUTPUT
5V INPUT/3.3V OUTPUT
07540-026
Figure 20. Typical I
CHn
Supply Current per Reverse Data Channel
(15 pF Output Load)
Data Sheet ADuM5200/ADuM5201/ADuM5202
Rev. B | Page 17 of 28
0
1
2
3
4
5
0 5 10
DATA RATE (Mbps)
CURRENT (mA)
15 20 25
3.3V
5V
07540-018
Figure 21. Typical I
ISO (D)
Dynamic Supply Current per Input
0
1.0
0.5
1.5
2.0
2.5
3.0
0 5 10
DATA RATE (Mbps)
CURRENT (mA)
15 20 25
3.3V
5V
07540-019
Figure 22. Typical I
ISO (D)
Dynamic Supply Current per Output
(15 pF Output Load)
ADuM5200/ADuM5201/ADuM5202 Data Sheet
Rev. B | Page 18 of 28
TERMINOLOGY
I
DD1 (Q)
I
DD1 (Q)
is the minimum operating current drawn at the V
DD1
pin when there is no external load at V
ISO
and the I/O pins are
operating below 2 Mbps, requiring no additional dynamic
supply current. I
DD1 (Q)
reflects the minimum current operating
condition.
I
DD1 (D)
I
DD1 (D)
is the typical input supply current with all channels
simultaneously driven at a maximum data rate of 25 Mbps with
full capacitive load representing the maximum dynamic load
conditions. Resistive loads on the outputs should be treated
separately from the dynamic load.
I
DD1 (MAX)
I
DD1 (MAX)
is the input current under full dynamic and V
ISO
load
conditions.
I
SO (LOAD)
I
SO (LOAD)
is the current available to the load.
t
PHL
Propagation Delay
t
PHL
propagation delay is measured from the 50% level of the
falling edge of the V
Ix
signal to the 50% level of the falling edge
of the V
Ox
signal.
t
PLH
Propagation Delay
t
PLH
propagation delay is measured from the 50% level of the
rising edge of the V
Ix
signal to the 50% level of the rising edge
of the V
Ox
signal.
Propagation Delay Skew, t
PSK
t
PSK
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature,
supply voltages, and output load within the recommended
operating conditions.
Channel-to-Channel Matching, t
PSKCD
/t
PSKOD
Channel-to-channel matching is the absolute value of the
difference in propagation delays between the two channels
when operated with identical loads.
Minimum Pulse Width
The minimum pulse width is the shortest pulse width at which
the specified pulse width distortion is guaranteed.
Maximum Data Rate
The maximum data rate is the fastest data rate at which the
specified pulse width distortion is guaranteed.

ADUM5201CRWZ-RL

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Digital Isolators Dual-CH w/ Intg DC/DC Converter
Lifecycle:
New from this manufacturer.
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