DS1318
Parallel-Interface Elapsed Time Counter
8 _____________________________________________________________________
Detailed Description
The parallel-interface ETC contains a 44-bit up counter
that maintains the amount of time the counter is
enabled. The resolution of the timer is 244µs. A control
register selects which events enable and disable the
counter. The counter is double-buffered into two regis-
ter sets, and the TE bit controls the updating of the
user-readable copy.
The counter can be used to maintain the cumulative
amount of time the primary power source or the battery
powers the device. In this mode, the counter starts
when the internal power-switching circuit enables the
selected power source and stops when the circuit
enables the other source.
The counter can also be used as an external event timer.
In this mode, the counter starts when the signal EXT tog-
gles to the active sate and stops when it toggles to the
inactive state. The active state of the EXT signal is con-
figurable as high or low. EXT is ignored and the counter
is disabled while the device is in power fail.
The interrupt output pin provides two maskable inter-
rupt sources. A 32-bit alarm register allows an interrupt
to be generated whenever the upper 32 bits of the
counter match the alarm register. A periodic interrupt
can also be generated from once every 244µs to once
every 1/12,097,152Hz (24.27 days). The alarm and
interrupt output operate when the device is operating
from either supply.
Table 1 shows the factors that control the device oper-
ation. V
SO
is the battery switchover voltage and is the
lesser of V
BAT
and V
PF
. While the device is operating
from the battery with the oscillator running, the battery
Table 1. Operation Modes for Power-Supply Conditions
Pin Description
PIN NAME FUNCTION
1 X1
2 X2
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is designed for
operation with a crystal having a 12.5pF specified load capacitance (C
L
). X1 is the input to the
oscillator and can optionally be connected to an external 32.768kHz oscillator. The output of the
internal oscillator, X2, is left unconnected if an external oscillator is connected to X1.
3, 12 GND Ground. This pin must be connected to ground for proper operation.
4 EXT External Counter-Enable Input
5–8 A3–A0 Address Bus Inputs
9, 10, 11,
13–17
DQ0–DQ7 Bidirectional Data Pins
18 CE Chip-Enable Input, Active Low
19 OE Output-Enable Input, Active Low
20 WE Write-Enable Input, Active Low
21 SQW Square-Wave Output
22 IRQ Interrupt Output. This active-low open-drain pin requires a pullup resistor.
23 V
BAT
Battery/Backup Power-Supply Input
24 V
CC
DC Power for Primary Power Supply
V
CC
CE OE WE DQ0–DQ7 A0–A4 MODE POWER
V
IH
X X High-Z X Deselect Standby
V
IL
XV
IL
D
IN
A
IN
Write Active
V
IL
V
IL
V
IH
D
OUT
A
IN
Read Active
V
CC
> V
PF
V
IL
V
IH
V
IH
High-Z A
IN
Read Active
V
SO
< V
CC
< V
PF
X X X High-Z X Deselect CMOS Standby
V
CC
< V
SO
< V
PF
X X X High-Z X
Data
Battery Current
