LT4351
7
4351fd
BLOCK DIAGRAM
+
15mV
ENABLE
ENABLE
QSW
C
UV
C
OV
0.3V
0.3V
0.33V
C
OVF
GND
OV
UV
R2
R1
R
A
SW
V
DD
V
IN
GATE
V
IN
+
+
324
6
5
7
OPEN
MOSFET
DETECT
600ns
ONE
SHOT
+
1
10
9
8
10.7V
REG
+
+
R
B
+
+
V
IN
FROM INDIVIDUAL SUPPLY
TO COMMON SUPPLY
V
OUT
OUT
OUT
ST
STATUS
FAULT
4351 BD
DRIVER
LT4351
8
4351fd
OPERATION
Increasingly, system designers have to deal with multiple
supply sources. The multiplicity may provide parallel,
redundant supplies for increased reliability or provide
a means of connecting disparate supplies. In all cases
the desire is for behavior like a diode but with no loss or
voltage drop.
ORing diodes have been the conventional means of con-
necting these supplies. The disadvantage of this approach
is that diodes introduce efficiency loss because of their
forward voltage drop. This variable voltage drop also de-
generates supply tolerance. Additionally, diodes provide
no information concerning the status of the sourcing
supply. Separate control must also be added to ensure
that a supply that is out of range is not allowed to affect
the common supply.
The LT4351 eliminates these problems by using N-channel
MOSFETs as the pass elements. The MOSFET is turned on
when power is being passed, allowing for a low voltage
drop from the supply to the load. When the input source
voltage drops below the output common supply voltage it
turns off the MOSFET, thereby matching the function and
performance of an ideal diode.
The LT4351 drives either a single MOSFET or dual back-
to-back MOSFETs. Dual MOSFETs are chosen to eliminate
current flow from the input supply to the output supply
when the V
IN
voltage is greater than OUT.
A driver amplifier monitors the input (V
IN
) and output
(OUT) and controls the MOSFETs. If V
IN
exceeds OUT
by 15mV, GATE goes high and turns on the MOSFET(s)
allowing for power passage.
Undervoltage and overvoltage comparators C
UV
, C
OV
and C
OVF
also control power passage. A resistive divider
in conjunction with the UV and OV pins sets appropriate
thresholds such that the MOSFET(s) is off when the UV
pin is below 300mV or OV pin is above 300mV.
To help deal with the transients on the supply lines, the UV
input has current hysteresis. When the UV voltage drops
below the 300mV threshold, a 10µA current is pulled from
the pin. Thus the user can set the hysteresis level through
appropriate values in the divider.
Overvoltage shutdown occurs in two stages. The first oc-
curs when the OV pin exceeds the 300mV reference. When
OV just exceeds the reference, an internal capacitor starts
charging, delaying the signal to turn off the MOSFET(s).
The second occurs when the OV pin exceeds 330mV. The
OVF comparator will immediately trip pulling GATE to GND.
This affords a delay inversely proportional to the amount of
overdrive. This also provides for glitch immunity without
compromising response time in the event of a serious
overvoltage condition.
The FAULT output indicates the status of the C
OV
, C
OVF
and C
UV
comparators. It pulls low during a fault condi-
tion. It also pulls low when GATE is at compliance and
V
IN
> OUT by more than 0.21V indicating a probable
nonfunctioning MOSFET. Compliance occurs when GATE
is at the lesser of OUT + 7.4V or V
DD
– 2.3V. FAULT derives
its drive from the greater of V
IN
or OUT. It is active if V
IN
or OUT is greater than 0.9V. If V
IN
or OUT is below this
level, the output state is not guaranteed.
The gate drive consists of a high current, wide bandwidth
amplifier (driver). When the amplifier is enabled, it attempts
to regulate the GATE voltage such that the voltage across
the MOSFET(s) is approximately 15mV. If the MOSFET(s)
on resistance is so high as to prevent regulation, then
GATE goes to compliance and the MOSFET(s) fully turns
on. The inputs to the amplifier are V
IN
and OUT. The GATE
pin sources current from V
DD
and sinks current to GND.
The maximum GATE to V
IN
voltage is the lesser of V
DD
2.3V or 7.4V above V
OUT
or V
IN
(internal clamp voltage).
The STATUS comparator, ST, pulls low when GATE ex-
ceeds V
IN
by 0.7V. This occurs when V
IN
> OUT + 15mV.
The STATUS pin pulls low as an indication that power is
passing through the MOSFET(s).
If V
IN
is greater than OUT by 0.21V and GATE > V
IN
+ 7.4V
or at compliance (GATE = V
DD
– 2.3V), STATUS will go
high as an indication of a likely open MOSFET. FAULT will
pull low in this state indicating the probable fault.
The gate drive amplifier and STATUS function derive power
from V
DD
. The circuit requires V
DD
> 2.5V. If V
DD
is present,
the gate drive amplifier and STATUS are active independent
of the state of V
IN
. If in a fault, GATE pulls actively low. In
the event of V
DD
collapse there still is an active pull-down
(though of lesser strength) of GATE powered from OUT,
guaranteeing turn off.
LT4351
9
4351fd
Setting Fault Thresholds
The gate drive amplifier implements the ideal diode func-
tion. The fault comparators (UV and OV) prevent out of
range input voltages from affecting the output by disabling
the amplifier during these conditions. Think of the UV and
OV as gating the ideal diode function, something a regular
diode cannot do.
A resistive divider from V
IN
to UV and one from V
IN
to OV
are the usual way of setting the FAULT thresholds. For UV
the resistor values are set by:
R2 =
UV
HYST
I
UVHYST
R1=
V
UV
UV
FAULT
– V
UV
R2
where UV
HYST
is the desired undervoltage hysteresis at
the input. UV
FAULT
is the desired undervoltage trip volt-
APPLICATIONS INFORMATION
Figure 1
age at the input. V
UV
is the part undervoltage trip point
(0.3V) and I
HYSTUV
is the undervoltage hysteresis current
(10µA). See Figure 1.
The divider on the OV pin is a straightforward resistive
divider (Figure 2):
R
B
=
OV
FAULT
V
OV
1
R
A
R
A
=
0.3V
R
A
,R
B
Divider Current
where OV
FAULT
is the desired overvoltage trip point at the
input and V
OV
is the OV pin threshold (0.3V). The OV pin
has 7mV of voltage hysteresis at room.
It is possible to do both dividers together using only three
resistors though with more interdependence in compo-
nents (Figure 3). The input bias current for UV and OV is
less than 200nA, so keep resistor values less than 10k.
The on-chip boost regulator uses a constant off-time
control scheme. When V
DD
is below the regulation trip
voltage, the switch turns on after a 600ns off-time. When
the switch turns on current ramps up in the inductor until
the current limit is reached (450mA). The switch turns
off and the inductors current flows through the external
diode to charge up the V
DD
capacitor. If V
DD
is still too low,
the switch turns on again after a fixed off-time of 600ns.
OPERATION
The boost regulator regulates V
DD
to approximately 10.7V
above V
IN
When V
DD
is above this level, the SW transistor
turn-on is disabled. When V
DD
falls below this level by the
hysteresis level, the SW transistor is allowed to turn on.
There is approximately 0.15V of hysteresis.
Figure 2 Figure 3 Figure 4
R2
R1
UV
I
HYS
10µA
V
UV
300mV
V
IN
UV TURNING ON UV TURNING OFF
R2
R1
UV
I
HYS
10µA
V
UV
300mV
4351 F01
V
IN
R
B
R
A
OV
V
OV
300mV
4351 F02
V
IN
R2
R3
R1
OV
UV
4351 F03
V
IN
C1
R2A
R2B
R1
UV
4351 F04
V
IN

LT4351CMS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC MOSFET Diode-OR Cntr
Lifecycle:
New from this manufacturer.
Delivery:
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