UM_8014_010 73S8014R/RN/RT 20SO Demo Board User Manual
Rev. 1.0 13
Table 5: 73S8014R/RN/RT Pin Description: Microcontroller Interface
Name Pin # Description
CMDVCC (R)
CMDVCC%
(RN/RT)
6
(R) - Command VCC (negative assertion): Logic low on this pin causes
the LDO regulator to ramp the V
CC
supply to the card and initiates a card
activation sequence, if a card is present.
(RN/RT) - Logic low on one or both of these pins will cause the LDO to
ramp the Vcc supply to the smart card and smart card interface to the
value described in the following table
CMDVCC% CMDVCC# Vcc Output Voltage
0 0 1.8V
0 1 5.0V
1 0 3.0V
1 1 LDO Off
Note: In order to set VCC to 1.8V, both CMDVCC% and CMDVCC# must
be asserted low within 400ns of each other. See the Data Sheet for
further details.
5V/#V (R)
CMDVCC#
(RN/RT)
7
(R) - 5 volt / 3 volt card selection: Logic one selects 5 volts for V
CC
and
card interface, logic low selects 3 volt operation. When the part is to be
used with a single card voltage, this pin should be tied to either GND or
V
DD
. However, it includes a high impedance pull-up resistor to default this
pin high (selection of 5V card) when not connected.
(RN/RT) See pin 6 above.
CLKDIV1
CLKDIV2
20
5
Sets the divide ratio from the XTAL oscillator (or external clock input) to
the card clock. These pins include pull-down resistors.
CLKDIV1 CLKDIV2 CLOCK RATE
0 0 XTALIN/8 (R) XTALIN/6 (RN/RT)
0 1 XTALIN/4
1 1 XTALIN/2
1 0 XTALIN
OFF 1
Interrupt signal to the processor. Active Low - Multi-function indicating
fault conditions or card presence. Open drain output configuration – It
includes an internal 22kΩ pull-up to V
DD.
RSTIN 2 Reset Input: This signal is the reset command to the card.
I/OUC 3
System controller data I/O to/from the card. Includes a pull-up resistor to
V
DD.
