73S8014R/RN/RT 20SO Demo Board User Manual UM_8014_010
16 Rev. 1.0
4 Appendix
This appendix includes the following tables and drawings of the PCB of the Evaluation Board:
Electrical Schematic
Bill of Materials
Silk Screen Layer – Top side
Silk Screen Layer – Bottom side
Metal Layer – Top side
Metal Layer – Middle 1, ground plane
Metal Layer – Middle 2, supply plane
Metal Layer – Bottom
UM_8014_010 73S8014R/RN/RT 20SO Demo Board User Manual
Rev. 1.0 17
Figure 4: TERIDIAN 73S8014R/RN/RT 20SO Demo Board: Electrical Schematic
PRES
GND
OFFB
SIO
GND
GND
+5V
SCLK
+5V
S_C8
S_C4
SCLKSCLKSCLKSCLKSCLKSCLKSCLKSCLK
3.3V
1
2
3
4
5
6
7
8
9
10
J4
TSM_110_01_L_SV
XTALOUTXTALOUTXTALOUTXTALOUT
+
C10
10uF
5V3VB/CMDVCC3B
C12
27pF
C9
27pF
3.3V
VDD
1
2
TP1
5.0V
R1
R3
VDD
5.0V
+
C1 10uF
1
2
3
4
5
6
7
8
9
10
J3
SSM_110_L_SV
CLKDIV1
I/OUC
CLKDIV2
R13
Rd
R10
Ru
IO
TP3 to TP8 to be placed
very close to the pads
of J5
OFF
VCC
J1 and J3 are placed on the bottom. J2 and J4
are placed on the top side.
C1
1
C2
2
C3
3
C5
4
C6
5
C7
6
SW1
7
SW2
8
J6
SIM/SAM Connector
RST
CLK
J1 must be aligned with J2 and J3 must be
aligned with J4 in order for this daughter
board to be stacked on another.
VDDF_ADJ
C1, C2, C8 and C5 must be
placed within 5mm of the U1
pins and connected by thick
track (wider than 0.5mm)
VDD
SELECT
CLK
RST
VCC
I/O
3.3V
5V
5V3VB/CMDVCC3B
CLKDIV2
CLKDIV1
CMDVCCB/CMDVCC5B
GND
RSTIN
+3.3V
C2 0.1uF
CMDVCCB/CMDVCC5B
RSTIN
1
2
TP3
VCC
1
RST
2
CLK
3
C4
4
GND
5
VPP
6
I/O
7
C8
8
SW-1
9
SW-2
10
J5
Smart Card Connector
R8
Ru
R9
Ru
R11
Rd
5.0V
R12
Rd
R8 to R13 and C36 to be
placed within 1cm of
J7.
R7
0
1
2
3
4
5
6
7
8
9
10
J1
SSM_110_L_SV
1
2
TP5
1
2
TP7
1
2
TP4
1
2
3
JP3
DNI
DNI
DNIDNI
DNI
DNIDNI
DNI
OFF
1
RSTIN
2
I/OUC
3
VPC
4
CLKDIV2
5
CMDVCC/CMDVCC5
6
5V_3V/CMDVCC3
7
VDDF_ADJ
12
GND
8
XTALIN
9
XTALOUT
10
GND
11
VDD
13
I/O
14
RST
15
GND
16
CLK
17
VCC
18
PRES
19
CLKDIV1
20
U1
73S8014R(N)/RT
1
2
3
4
5
6
7
8
9
10
J2
TSM_110_01_L_SV
+
C3
10uF
R6
20K
C11
1.0uF
1
2
3
JP1
XTALIN
SCLK
XTALIN
SELECT
XTAL
C6
DNI
12
Y1
12.000MHz
C5
22pF
VDD
C4
22pF
VDD
C8
0.1uF
When using an external clock
source, C7 should be removed.
73S8014R/RN/RT 20SO Demo Board User Manual UM_8014_010
18 Rev. 1.0
Table 6: TERIDIAN 73S8014R/RN/RT 20SO Demo Board: Bill of Material
Item Qty Reference Part
PCB Footprint
(see attached zip
file)
Digikey Part
Number
Part Number Manufactuer
1 3 C1, C3, C10 CAP 10UF 6.3V CERAMIC X5R 0805 805 PCC2225CT-ND ECJ-2FB0J106M Panasonic
2 1 C11 CAP 1.0UF 6.3V CERAMIC X5R 0603 603 PCC1915CT-ND ECJ-1VB0J105K Panasonic
3 2 C2, C8 CAP .1UF 16V CERAMIC X7R 0603 603 PCC1762CT-ND ECJ-1VB1C104K Panasonic
4 2 C12, C9 CAP CERAMIC 27PF 50V 0603 SMD 603 PCC270ACVCT-ND ECJ-1VC1H270J Panasonic
5 2 C4, C5 CAP CERAMIC 22PF 50V 0603 SMD 603 PCC220ACVCT-ND ECJ-1VC1H220J Panasonic
6 1 R7 RES ZERO OHM 1/10W 5% 0603 SMD 603 P0.0GCT-ND ERJ-3GEY0R00V Panasonic
7 1 R6 RES 20K OHM 1/10W 5% 0603 SMD 603 P20KGCT-ND ERJ-3GEYJ203V Panasonic
8 1 J6 CONN SMART CARD SIM/SAM 6PIN SMD
ITT_CCM03-
3013
401-1691-1-ND CCM03-3754 ITT Industries
9 1 J5 CONN SMART CARD 8PIN SMD CCM02-2504 401-1715-ND CCM02-2504LFT ITT Industries
10 5
TP1, TP3,
TP4, TP5, TP7
HEADER 2
2pins, 2.54mm
pich
S1011E-36-ND PZC36SAAN Sullins
11 2 JP1, JP3 HEADER 3
3pins, 2.54mm
pich
12 2 J1, J3 SSM_110_L_SV
SSM_110_L_
SV
N/A SSM_110_L_SV Samtec
13 2 J2, J4 TSM_110_01_L_SV
TSM_110_01_
L_SV
N/A
TSM_110_01_L_S
V
Samtec
14 1 Y1 CRYSTAL 12.000 MHZ 20PF 49US HC-49US X190-ND ECS-120-20-4DN ENGYA
15 1 U1 73S8014R/RN/RT 73S8014R/RN/RT
Teridian
Semiconductor
Note: The resistors and capacitors marked DNI are not populated on the board. They can be implemented to adjust the features of the smart card
reader.

73S8014R-DB

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
BOARD DEMO 73S8010R 20-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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