–9–
REV. A
AD8013
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
180
90
0
–90
PHASE SHIFT – Degrees
G = –10
R
L
= 150
V
S
= ±5V
V
S
= +5V
V
S
= +5V
V
S
= ±5V
GAIN
PHASE
Figure 27. Closed-Loop Gain and Phase vs. Frequency,
G = –10, R
L
= 150
To estimate the –3 dB bandwidth for closed-loop gains of 2 or
greater, for feedback resistors not listed in the following table,
the following single pole model for the AD8013 may be used:
ACL .
G
1+ SC
T
(R
F
+Gn rin)
where: C
T
= transcapacitance > 1 pF
R
F
= feedback resistor
G = ideal closed loop gain
Gn =
1+
R
F
R
G
= noise gain
rin = inverting input resistance > 150
ACL = closed loop gain
The –3 dB bandwidth is determined from this model as:
f
3
.
1
2 π C
T
(R
F
+Gn rin)
This model will predict –3 dB bandwidth to within about 10%
to 15% of the correct value when the load is 150 and V
S
=
±5 V. For lower supply voltages there will be a slight decrease in
bandwidth. The model is not accurate enough to predict either
the phase behavior or the frequency response peaking of the
AD8013.
It should be noted that the bandwidth is affected by attenuation
due to the finite input resistance. Also, the open-loop output
resistance of about 12 reduces the bandwidth somewhat when
driving load resistors less than about 250 . (Bandwidths will
be about 10% greater for load resistances above a few hundred
ohms.)
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Feedback
Resistor, R
L
= 150 (SOIC)
V
S
– Volts Gain R
F
– Ohms BW – MHz
±5 +1 2000 230
+2 845 (931) 150 (135)
+10 301 80
–1 698 (825) 140 (130)
–10 499 85
+5 +1 2000 180
+2 887 (931) 120 (130)
+10 301 75
–1 698 (825) 130 (120)
–10 499 80
Driving Capacitive Loads
When used in combination with the appropriate feedback
resistor, the AD8013 will drive any load capacitance without
oscillation. The general rule for current feedback amplifiers is
that the higher the load capacitance, the higher the feedback
resistor required for stable operation. Due to the high open-loop
transresistance and low inverting input current of the AD8013,
the use of a large feedback resistor does not result in large closed-
loop gain errors. Additionally, its high output short circuit current
makes possible rapid voltage slewing on large load capacitors.
For the best combination of wide bandwidth and clean pulse
response, a small output series resistor is also recommended.
Table II contains values of feedback and series resistors which
result in the best pulse responses. Figure 29 shows the AD8013
driving a 300 pF capacitor through a large voltage step with
virtually no overshoot. (In this case, the large and small signal
pulse responses are quite similar in appearance.)
General
The AD8013 is a wide bandwidth, triple video amplifier that
offers a high level of performance on less than 4.0 mA per
amplifier of quiescent supply current. The AD8013 uses a
proprietary enhancement of a conventional current feedback
architecture, and achieves bandwidth in excess of 200 MHz with
low differential gain and phase errors, making it an extremely
efficient video amplifier.
The AD8013’s wide phase margin coupled with a high output
short circuit current make it an excellent choice when driving
any capacitive load. High open-loop gain and low inverting
input bias current enable it to be used with large values of
feedback resistor with very low closed-loop gain errors.
It is designed to offer outstanding functionality and performance
at closed-loop inverting or noninverting gains of one or greater.
Choice of Feedback & Gain Resistors
Because it is a current feedback amplifier, the closed-loop band-
width of the AD8013 may be customized using different values
of the feedback resistor. Table I shows typical bandwidths at
different supply voltages for some useful closed-loop gains when
driving a load of 150 .
The choice of feedback resistor is not critical unless it is
important to maintain the widest, flattest frequency response.
The resistors recommended in the table are those (chip
resistors) that will result in the widest 0.1 dB bandwidth without
peaking. In applications requiring the best control of bandwidth,
1% resistors are adequate. Package parasitics vary between the
14-pin plastic DIP and the 14-pin plastic SOIC, and may result
in a slight difference in the value of the feedback resistor used to
achieve the optimum dynamic performance. Resistor values and
widest bandwidth figures are shown in parenthesis for the SOIC
where they differ from those of the DIP. Wider bandwidths than
those in the table can be attained by reducing the magnitude of
the feedback resistor (at the expense of increased peaking),
while peaking can be reduced by increasing the magnitude of
the feedback resistor.
Increasing the feedback resistor is especially useful when driving
large capacitive loads as it will increase the phase margin of the
closed-loop circuit. (Refer to the section on driving capacitive
loads for more information.)
AD8013
REV. A
–10–
4
+V
S
AD8013
1.0µF
0.1µF
11
1.0µF
0.1µF
–V
S
R
G
R
T
V
IN
15
C
L
V
O
R
F
R
S
Figure 28. Circuit for Driving a Capacitive Load
Table II. Recommended Feedback and Series Resistors vs.
Capacitive Load and Gain
R
S
– Ohms
C
L
– pF R
F
– Ohms G = 2 G 3
20 2k 25 15
50 2k 25 15
100 3k 20 15
200 4k 15 15
300 6k 15 15
500 7k 15 15
10
0%
100
90
50ns
500mV
1V
V
IN
V
OUT
Figure 29. Pulse Response Driving a Large Load Capacitor.
C
L
= 300 pF, G = +2, R
F
= 6k, R
S
= 15
Overload Recovery
The three important overload conditions are: input common-
mode voltage overdrive, output voltage overdrive, and input
current overdrive. When configured for a low closed-loop gain,
the amplifier will quickly recover from an input common-
mode voltage overdrive; typically in under 25 ns. When con-
figured for a higher gain, and overloaded at the output, the
recovery time will also be short. For example, in a gain of +10,
with 15% overdrive, the recovery time of the AD8013 is about
20 ns (see Figure 30). For higher overdrive, the response is
somewhat slower. For 6 dB overdrive, (in a gain of +10), the
recovery time is about 65 ns.
10
0%
100
90
50ns
500mV
5V
V
IN
V
OUT
Figure 30. 15% Overload Recovery, G = +10 (R
F
= 300
,
R
L
= 1 k
, V
S
=
±
5 V)
As noted in the warning under “Maximum Power Dissipation,”
a high level of input overdrive in a high noninverting gain circuit
can result in a large current flow in the input stage. Though this
current is internally limited to about 30 mA, its effect on the
total power dissipation may be significant.
High Performance Video Line Driver
At a gain of +2, the AD8013 makes an excellent driver for a
back terminated 75 video line (Figures 31, 32, and 33). Low
differential gain and phase errors and wide 0.1 dB bandwidth
can be realized. The low gain and group delay matching errors
ensure excellent performance in RGB systems. Figures 34 and
35 show the worst case matching.
75
75
V
OUT
75
CABLE
75
75
CABLE
4
+V
S
AD8013
0.1µF
11
0.1µF
–V
S
R
G
V
IN
R
F
Figure 31. A Video Line Driver Operating at a Gain of +2
(R
F
= R
G
from Table I)
FREQUENCY – Hz
1M 1G10M
CLOSED-LOOP GAIN
(NORMALIZED) – dB
100M
–6
+1
0
–1
–2
–3
–4
–5
0
–90
–180
–270
PHASE SHIFT – Degrees
G = +2
R
L
= 150
V
S
= ±5V
V
S
= +5V
V
S
= +5V
V
S
= ±5V
GAIN
PHASE
Figure 32. Closed-Loop Gain & Phase vs. Frequency
for the Line Driver
FREQUENCY – Hz
1M 1G10M
NORMALIZED GAIN – dB
100M
+0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
G = +2
R
L
= 150
V
S
= +5V
V
S
= ±5V
+0.2
Figure 33. Fine-Scale Gain Flatness vs. Frequency,
G = +2, R
L
= 150
–11–
REV. A
AD8013
FREQUENCY – Hz
1.5
1.0
–2.0
1M 1G10M
GAIN MATCHING – dB
100M
0.5
0
–0.5
–1.0
–1.5
G = +2
R
L
= 150
V
S
= +5V
V
S
= ±5V
Figure 34. Closed-Loop Gain Matching vs. Frequency
FREQUENCY – Hz
10
8
2
4
6
–1.0
0.5
0
–0.5
1.0
100k 100M1M
GROUP DELAY – ns
10M
V
S
= +5V
V
S
= ±5V
G = +2
R
L
= 150
G = +2
R
L
= 150
DELAY
MATCHING
DELAY
V
S
= +5V
V
S
= ±5V
Figure 35. Group Delay and Group Delay Matching
vs. Frequency, G = +2, R
L
= 150
Disable Mode Operation
Pulling the voltage on any one of the Disable pins about 1.6V
up from the negative supply will put the corresponding
amplifier into a disabled, powered down, state. In this
condition, the amplifier’s quiescent current drops to about
0.3 mA, its output becomes a high impedance, and there is
a high level of isolation from input to output. In the case of
the gain of two line driver for example, the impedance at the
output node will be about the same as for a 1.6 k resistor
(the feedback plus gain resistors) in parallel with a 12 pF
capacitor and the input to output isolation will be about
66 dB at 5 MHz.
Leaving the Disable pin disconnected (floating) will leave
the corresponding amplifier operational, in the enabled
state. The input impedance of the disable pin is about 40 k
in parallel with a few picofarads. When driven to 0 V, with
the negative supply at –5 V, about 100 µA flows into the
disable pin.
When the disable pins are driven by complementary output
CMOS logic, on a single 5 V supply, the disable and enable
times are about 50 ns. When operated on dual supplies,
level shifting will be required from standard logic outputs to
the Disable pins. Figure 36 shows one possible method
which results in a negligible increase in switching time.
+5V
10k
TO DISABLE PIN
V
I
V
I
HIGH => AMPLIFIER ENABLED
V
I
LOW => AMPLIFIER DISABLED
–5V
4k
8k
Figure 36. Level Shifting to Drive Disable Pins on Dual
Supplies
The AD8013’s input stages include protection from the large
differential input voltages that may be applied when disabled.
Internal clamps limit this voltage to about ±3 V. The high input to
output isolation will be maintained for voltages below this limit.
3:1 Video Multiplexer
Wiring the amplifier outputs together will form a 3:1 mux with
excellent switching behavior. Figure 37 shows a recommended
configuration which results in –0.1 dB bandwidth of 35 MHz
and OFF channel isolation of 60 dB at 10 MHz on ±5 V
supplies. The time to switch between channels is about 50 ns.
Switching time is virtually unaffected by signal level.
665
75
V
IN
1
84
845
DISABLE 1
V
OUT
75
75
CABLE
–V
S
7
6
5
4
+V
S
1
665
75
V
IN
2
84
845
DISABLE 2
14
13
12 2
665
75
V
IN
3
84
845
8
9
10
3
11
DISABLE 3
Figure 37. A Fast Switching 3:1 Video Mux (Supply
Bypassing Not Shown)
10
0%
100
90
200ns
500mV
5V
Figure 38. Channel Switching Characteristic for the
3:1 Mux

AD8013AR-14

Mfr. #:
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Description:
Video Amplifiers SGL Supply Low Power Triple
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