7
FN7360.5
November 5, 2007
FIGURE 7. F
S
vs I
O
FIGURE 8. LOAD REGULATIONS
FIGURE 9. HTSSOP THERMAL RESISTANCE vs PCB AREA
(NO AIR FLOW)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Typical Performance Curves (Continued)
V
IN
= V
D
= 3.3V, V
O
= 1.8V, I
O
= 4A, L = 2.2µH, C
IN
= 2x10µF, C
OUT
= 47µF, C
OSC
= 220pF, T
A
= +25°C unless otherwise noted.
610
590
585
01.52.54
F
S
(KHz)
I
O
(A)
595
0.5 2 3.5
600
605
1
3
V
IN
=5V
V
IN
=3.3V
0.8
-0.2
-0.4
04
(%)
I
O
(A)
0.6
0.2
123
0.4
0.0
50
45
40
35
30
25
123456789
PCB AREA (in
2
)
θ
JA
(°C/W)
CONDITION:
28 Ld HTSSOP THERMAL PAD
SOLDERED TO 2-LAYER PCB
WITH 0.039" THICKNESS AND
1 OZ. COPPER ON BOTH SIDES
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
3.5
2.5
2.0
1.0
0.5
0
0 25 50 75 100 150
AMBIENT TEMPERATURE (°C)
ALLOWABLE POWER DISSIPATION (W)
12585
1.5
θ
J
A
=
3
0
°
C
/
W
H
T
S
S
O
P
2
8
3.0
1.00
0.90
0.30
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
ALLOWABLE POWER DISSIPATION (W)
85
θ
J
A
=
1
1
0
°
C
/
W
H
T
S
S
O
P
2
8
0.70
0.20
0.50
125
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.10
0.40
0.60
0.80
EL7554
8
FN7360.5
November 5, 2007
Waveforms
V
IN
= V
D
= 3.3V, V
O
= 1.8V, I
O
= 4A, L = 2.2µH, C
IN
= 2x10µF, C
OUT
= 47µF, C
OSC
= 220pF, T
A
= +25°C unless otherwise noted.
FIGURE 12. START-UP
FIGURE 13. STEADY-STATE OPERATION
FIGURE 14. SHUT-DOWN FIGURE 15. TRANSIENT RESPONSE
FIGURE 16. VOLTAGE MARGINING
FIGURE 17. OVER-VOLTAGE SHUT-DOWN
V
IN
(2V/DIV)
I
IN
(1A/DIV)
V
O
(1V/DIV)
PG (2V/DIV)
0.5ms/DIV
ΔV
IN
(100mV/DIV)
V
LX
(2V/DIV)
ΔV
O
(10mV/DIV)
1µs/DIV
V
EN
I
IN
(2A/DIV)
V
O
(2V/DIV)
50µs/DIV
3A
I
O
ΔV
O
(100mV/DIV)
1.0A
100µs/DIV
TM
SEL
ΔV
O
(200mV/DIV)
1ms/DIV
PG
V
O
(2V/DIV)
V
LX
(5V/DIV)
0.5ms/DIV
EL7554
9
FN7360.5
November 5, 2007
Detailed Description
The EL7554 is a full-feature synchronous 6A step-down
regulator capable of up to 96% efficiency. This device
operates from 3V to 6V V
IN
input supply. With internal
CMOS power FETs, the device can operate at up to 100%
duty ratio, allowing for output voltage range from 0.8V up to
nearly V
IN
.The adjustable high switching frequency of up to
1MHz enables the use of small components, making the
whole converter occupy less than 0.58 square inch with
components on one side of the PCB. The EL7554 operates
at constant frequency PWM mode, making external
synchronization possible. Patented on-chip resistorless
current-sensing enables current mode control, which
provides over-current protection, and excellent step load
response. The EL7554 features soft-start and full start-up
control, which eliminate the in-rush current and enables
users to control the start-up of multiple converters to any
configuration with ease. The EL7554 also offers a ±5%
voltage margining capability that allows raising and lowering
of the supplies derived from the EL7554 to validate the
performance and reliability of system cards quickly and
easily during manufacturing testing. A junction temperature
indicator conveniently monitors the silicon die temperature,
saving designers time in the tedious thermal
characterization.
Start-Up
The EL7554 employs a special soft-start to suppress the in-
rush current (see Figure 12). The start-up process takes
about 2ms and begins when the input voltage reaches about
2.8V and EN pin voltage 2V. When EN is released from
LOW, or the converter comes out of thermal shut-down
mode, the soft-start process repeats. When the input voltage
ramps up too slowly, slight over- current at the input can
occur. Connecting a small capacitor at EN will delay the
start-up. The delay time T
D
can be calculated by:
where:
•C
EN
is the capacitance at EN pin
•V
EN_HI
is the EN input high level (function of V
DD
voltage,
see Figure 5)
•I
EN
is the EN pin pull-up current, nominal 2.5µA
If a slower than 2ms soft start-up is needed, please refer to
Full Start-Up Control section.
Steady-State Operation
The converter always operates at fixed frequency
continuous-conduction mode. For fast transient response,
peak current control method is employed. The inductor
current is sensed from the upper PFET. This current signal,
the slope compensation, and the compensated error signal
are fed to the PWM comparator to generate the PWM signal
for the internal power switches. When the upper PFET is on,
the low-side NFET is off and input voltage charges the
inductor. When PFET is off, the NFET is on and energy
stored in the inductor is dumped to the output to maintain
constant output voltage. Therefore, the LX waveform is
always a stable square waveform (see Figure 13) with peak
close to V
IN
. So LX is a good indication that the converter is
operating properly.
100% Duty Ratio
EL7554 uses CMOS as internal synchronous power
switches. The upper switch is a PMOS and the lower switch
an NMOS. This not only saves a boot capacitor, it also
allows 100% turn-on of the upper PFET switch, achieving
FIGURE 18. ADJUSTABLE START-UP
FIGURE 19. TRACKING START-UP
Waveforms (Continued)
V
IN
= V
D
= 3.3V, V
O
= 1.8V, I
O
= 4A, L = 2.2µH, C
IN
= 2x10µF, C
OUT
= 47µF, C
OSC
= 220pF, T
A
= +25°C unless otherwise noted.
V
IN
(2V/DIV)
I
IN
(2A/DIV)
V
O
(1V/DIV)
2ms/DIV
C
IN
= 100µF,
C
OUT
= 150µF
V
IN
(5V/DIV)
V
O1
=2.5V
V
O2
=1.8V
5ms/DIV
C
IN
= 100µF,
C
OUT
= 150µF
T
D
C
EN
V
EN_HI
I
EN
--------------------
×=
EL7554

EL7554IREZ-T13

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Voltage Regulators LDFREE EL7554 6 AMP DC:DC STP DWNG
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union