7
LTC1091/LTC1092
LTC1093/LTC1094
CCHARA TERIST
ICS
UW
AT
Y
P
I
CA
LPER
F
O
R
C
E
LTC1092/LTC1093/LTC1094
Unadjusted Offset Error vs
Reference Voltage
LTC1092/LTC1093/LTC1094
Linearity Error vs
Reference Voltage
REFERENCE VOLTAGE (V)
0
LINEARITY ERROR (LSB = • V
REF
)
1.25
1.00
0.75
0.50
0.25
0
4
1092/2/3/4 G20
1
2
3
5
1
1024
V
CC
= 5V
REFERENCE VOLTAGE (V)
0
CHANGE IN FULL-SCALE ERROR (LSB = • V
REF
)
1.25
1.00
0.75
0.50
0.25
0
4
1092/2/3/4 G21
1
2
3
5
1
1024
V
CC
= 5V
REFERENCE VOLTAGE (V)
0.1 0.2 1 5 10
1091/2/3/4 G19
10
9
8
7
6
5
4
3
2
1
0
V
CC
= 5V
V
OS
= 1mV
V
OS
= 0.5mV
OFFSET ERROR (LSB = • V
REF
)
1
1024
LTC1092/LTC1093/LTC1094
Change in Full-Scale Error vs
Reference Voltage
SUPPLY VOLTAGE (V)
4
OFFSET ERROR (LSB)
1.25
1.00
0.75
0.50
0.25
0
5
678
1091/2/3/4 G23
910
V
REF
= 4V
f
CLK
= 500kHz
V
OS
= 1.25mV AT V
CC
= 5V
REFERENCE VOLTAGE (V)
0.1 0.2 1 5 10
1091/2/3/4 G22
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
NOISE = 200µV
P-P
PEAK-TO-PEAK NOISE ERROR (LSB)
SUPPLY VOLTAGE (V)
4
LINEARITY ERROR (LSB)
1.25
1.00
0.75
0.50
0.25
0
5
678
1091/2/3/4 G24
910
V
REF
= 4V
f
CLK
= 500kHz
LTC1092/LTC1093/LTC1094
Linearity Error vs Supply Voltage
LTC1092/LTC1093/LTC1094
Offset Error vs Supply Voltage
LTC1092/LTC1093/LTC1094
Noise Error vs Reference Voltage
LTC1092/LTC1093/LTC1094
Change in Full-Scale Error vs
Supply Voltage
SUPPLY VOLTAGE (V)
4
CHANGE IN FULL-SCALE ERROR (LSB)
0.50
0.25
0
0.25
0.50
0.75
5
678
1091/2/3/4 G25
910
V
REF
= 4V
f
CLK
= 500kHz
SUPPLY VOLTAGE (V)
4
5
678
1091/2/3/4 G26
910
SUPPLY CURRENT (mA)
6
5
4
3
2
1
0
V
REF
OPEN
f
CLK
= 500kHz
CS = V
CC
T
A
= 25°C
AMBIENT TEMPERATURE (°C)
–50
SUPPLY CURRENT (mA)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
50
1091/2/3/4 G27
–25
0
25
75
125100
V
REF
OPEN
f
CLK
= 500kHz
CS = 5V
V
CC
= 5V
LTC1092/LTC1093/LTC1094
Supply Current vs Supply Voltage
LTC1092/LTC1093/LTC1094
Supply Current vs Temperature
8
LTC1091/LTC1092
LTC1093/LTC1094
LTC1092/LTC1093/LTC1094
Reference Current vs Temperature
AMBIENT TEMPERATURE (°C)
–50
REFERENCE CURRENT (mA)
0.6
0.5
0.4
0.3
0.2
0.1
0
50
1091/2/3/4 G28
–25
0
25
75
125100
V
REF
= 5V
AMBIENT TEMPERATURE (°C)
–50
0
INPUT CHANNEL LEAKAGE CURRENT (nA)
100
300
400
500
1000
700
0
25
50 125
1091/2/3/4 G29
200
800
900
600
–25
75
100
ON-CHANNEL
OFF-CHANNEL
GUARANTEED
LTC1093/LTC1094 Input Channel
Leakage Current vs Temperature
PI FU CTIO S
U
UU
LTC1091/LTC1092
CS (Pin 1): Chip Select Input. A logic low on this input
enables the LTC1091/LTC1092.
CH0, CH1/+IN, –IN (Pins 2, 3): Analog Inputs. These
inputs must be free of noise with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
D
IN
(Pin 5)(LTC1091): Digital Data Input. The multiplexer
address is shifted into this input.
V
REF
(Pin 5)(LTC1092): Reference Input. The reference
input defines
the span of the A/D converter and must be
kept free of noise with respect to AGND.
D
OUT
(Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the serial
data transfer.
V
CC
(V
REF
)(Pin 8)(LTC1091): Positive Supply and Refer-
ence Voltage. This pin provides power and defines the
span of the A/D converter. It must be kept free of noise and
ripple by bypassing directly to the analog ground plane.
V
CC
(Pin 8 )(LTC1092): Positive Supply Voltage. This pin
provides power to the A/D converter. It must be kept free
of noise and ripple by bypassing directly to the analog
ground plane.
LTC1093/LTC1094
CH0 to CH5/CH0 to CH7 (Pins 1 to 6/Pins 1 to 8): Analog
Inputs. The analog inputs must be free of noise with
respect to AGND.
COM (Pin 7/Pin 9): Common. The common pin defines the
zero reference point for all single-ended inputs. It must be
free of noise and is usually tied to the analog ground plane.
DGND (Pin 8/Pin 10): Digital Ground. This is the ground
for the internal logic. Tie to the ground plane.
V
(Pin 9/Pin 11): Negative Supply. Tie V
to most
negative potential in the circuit. (Ground in single supply
applications.)
AGND (Pin 10/Pin 12): Analog Ground. AGND should be
tied directly to the analog ground plane.
CCHARA TERIST
ICS
UW
AT
Y
P
I
CA
LPER
F
O
R
C
E
9
LTC1091/LTC1092
LTC1093/LTC1094
INPUT
SHIFT
REGISTER
SAMPLE-
AND-HOLD
10-BIT
CAPACITIVE
DAC
AV
CC
ANALOG
INPUT MUX
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
D
OUT
CLK
CONTROL
AND
TIMING
CS
1091/2/3/4 BD
REF
+
DGND
AGND
V
REF
COMP
OUTPUT
SHIFT
REGISTER
D
IN
10-BIT
SAR
1
2
3
4
5
6
7
8
9
10
11 12 13 14
DV
CC
19
17
16
18
15
20
(Pin numbers refer to LTC1094)
BLOCK DIAGRA
W
V
REF
(Pin 11)(LTC1093): Reference Input. The reference
input must be kept free of noise with respect to AGND.
REF
+
, REF
(Pins 13, 14 )(LTC1094): Reference Input.
The reference input must be kept free of noise with respect
to AGND.
D
IN
(Pin 12/Pin 15): Data Input. The A/D configuration
word is shifted into this input.
D
OUT
(Pin 13/Pin 16): Digital Data Output. The A/D con-
version result is shifted out of this output.
CS (Pin 14/Pin 17): Chip Select Input. A logic low on this
input enables the LTC1093/LTC1094.
PI FU CTIO S
U
UU
CLK (Pin 15/Pin 18): Shift Clock. This clock synchronizes
the serial data transfer.
V
CC
(Pin 16)(LTC1093): Positive Supply. This supply
must be kept free of noise and ripple by bypassing directly
to the analog ground plane.
AV
CC
, DV
CC
(Pins 19, 20)(LTC1094): Positive Supply.
This supply must be kept free of noise and ripple by
bypassing directly to the analog ground plane. AV
CC
and
DV
CC
should be tied together on the LTC1094.

LTC1093CN#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 10-Bit Serial I/O ADC w/6CH MUX
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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