M74HC299
2/13
IINPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
* When one or both output controls are high, the eight input/output terminals are in the high impedance state: however sequential operation
or clearing of the register is not affected.
Z : High Impedance
Qn0 : The level of An before the indicated steady state input conditions were established.
Qnn : The level of Qn before the most recent active transition indicated by OR
a, h : The level of the steady state inputs A, H, respectively.
X : Don’t Care
PIN No SYMBOL NAME AND FUNCTION
1, 19 S0, S1 Mode Select Inputs
2, 3 G1
, G2 3-State Output Enable Inputs (Active LOW)
7, 13, 6, 14, 5, 15, 4, 16 A/QA to H/QH Parallel Data Inputs or 3-State Parallel Outputs (Bus Driver)
8, 17 QA’ to QH’ Serial Outputs (Standard Output)
9 CLEAR
Asynchronous Master Reset Input (Active LOW)
11 SR Serial Data Shift Right Input
12 CLOCK Clock Input (LOW to HIGH, Edge-triggered)
18 SL Serial Data Shift Left Input
10 GND Ground (0V)
20 V
CC
Positive Supply Voltage
MODE
INPUTS INPUTS/OUTPUTS OUTPUTS
CLEAR
FUNCTION
SELECTED
OUTPUT
CONTROL
CLOCK
SERIAL
A/QA H/QH QA’ QH’
S1 S0 G1
*G2*SLSR
ZLHHXXXXXZZLL
CLEAR
L L X L L X X XLLLL
L X L L L X X XLLLL
HOLD H L L L L X X X QA0 QH0 QA0 QH0
SHIFT
RIGHT
H L H L L X H H QGn H QGn
H L H L L X L L QGn L QGn
SHIFT
LEFT
H H L L L H X QBnHQBnH
H H L L L L X QBnLQBnL
LOADH H H X X X Xahah
