10
LT3750
3750fa
APPLICATIO S I FOR ATIO
WUUU
The transistor’s continuous drain current rating must
exceed I
AVG,M
.
Table 4 lists recommended NMOS transistors.
Setting Current Limit
A sense resistor from the SOURCE pin to GND implements
current limit. The current limit is nominally 78mV/R
SENSE
.
The average power dissipation rating of the current sense
resistor must exceed:
P
IR
V
VNV
RESISTOR
PK SENSE
OUT PK
OUT PK T
+
2
3
()
()
RRANS
Additionally, there is approximately a 100ns propagation
delay from the time that peak current limit is detected to
when the gate transitions to the low state. This delay
increases the peak current limit by (V
TRANS
)(t
DELAY
)/L
PRI
.
Setting The Target Output Voltage
The parameters that determine the target output voltage
are the resistors R
VOUT
and R
BG
, the turns ratio of the
transformer (N), and the voltage drop across the output
diode (V
DIODE
). The target output voltage is set according
to the following equation:
VV
R
R
NV
OUT
VOUT
BG
DIODE
=
124.•
Use at least 1% tolerance resistors for R
VOUT
and R
BG
.
Choosing large value resistors for R
BG
decreases the
amount of current that charges the parasitic internal
capacitances and degrades the response time of the V
OUT
comparator. This may result in overcharging of the output
capacitor. The maximum recommended value for R
BG
is
2.5k for typical applications.
When high primary currents are used, a voltage spike
can prematurely trip the output voltage comparator. A
33pF to 100pF capacitor in parallel with R
BG
is sufficient to
filter this spike for most applications. Always check that
the voltage waveform on RBG does not overshoot and that
it reaches a plateau at maximum V
OUT
.
Discontinuous Mode Detection
The R
DCM
resistor stands off voltage transients on the
drain node. A 43k, 5% resistor is recommended for 300V
applications. Higher output voltages will require a larger
resistor.
In order for the LT3750 to properly detect discontinuous
mode and start a new charge cycle, the reflected voltage to
the primary winding must exceed the discontinuous mode
comparator threshold which is nominally 36mV. The
worst-case condition occurs when V
OUT
is shorted to
ground. When this occurs, the reflected voltage is simply
the diode forward voltage drop divided by N.
Table 4. Recommended NMOS Transisitors
MANUFACTURER PART NUMBER I
D
(A) V
DS(MAX)
(V) V
GS(MAX)
(V) R
DS(ON)
(m) PACKAGE
Philips Semiconductor PHM21NQ15T 22.2 150 20 55 HVSON8
(www.semiconductors.philips.com) PHK12NQ10T 11.6 100 20 28 SO-8
PHT6NQ10Y 6.5 100 20 90 SOT223
PSMN038-100K 6.3 100 20 38 SO-8
International Rectifier IRF7488 6.3 80 20 29 SO-8
(www.irf.com) IRF7493 9.3 80 20 15 SO-8
IRF6644 10.3 100 20 10.7 DirectFET
11
LT3750
3750fa
APPLICATIO S I FOR ATIO
WUUU
Figure 4. Recommended Board Layout
(Not to Scale)
Board Layout
The high voltage operation of the the LT3750 demands
careful attention to board layout. Observe the following
points:
1. Minimize the area of the high voltage end of the second-
ary winding.
2. Provide sufficient spacing for all high voltage nodes
(NMOS drain, V
OUT
and the secondary winding of the
transformer) in order to meet breakdown voltage
requirements.
3. Keep the electrical path formed by C1, the primary of T1
and drain of the NMOS as small as possible. Increasing
the size of this path effectively increases the leakage
inductance of T1 resulting in an overvoltage condition
on the drain of the NMOS.
1
C
TRANS
C
PRI
R
BG
2
3
4
5
10
LT3750
9
8
7
6
R
SENSE
M1
R
DCM
R
VOUT
C
OUT
3750 F04
D
OUT
T1
1:N
PRIMARY
C
IN
V
CC
V
TRANS
CHARGE
R
DONE
SECONDARY
+
12
LT3750
3750fa
TYPICAL APPLICATIO S
U
300V, 3A Capacitor Charger
V
CC
DONE
CHARGE
RV
OUT
RDCM
GATE
SOURCE
V
TRANS
60.4k
T1
1:10
D1
V
OUT
300V
V
TRANS
V
CC
12V
C4
100µF
43k
25m
M1
3750 TA02a
LT3750
GND RBG
100k
4, 5
6, 7
1
10
2.49k 33pF
OFF ON
C1
10µF
C2
10µF
C3
56µF
+
C1: 25V X5R OR X7R CERAMIC CAPACITOR
C2: 25V X5R OR X7R CERAMIC CAPACITOR
C3: 25V SANYO OS-CON 25SVP56M
C4: 330V RUBYCON PHOTOFLASH CAPACITOR
D1: DIODES INC. MURS160
M1: PHILIPS PHT6NQ10T
T1: TDK DCT15EFD-U44S003 FLYBACK TRANSFORMER
V
OUT
(V)
0
50
EFFICIENCY (%)
60
70
80
90
100
50
100 150 200
3750 TA02b
250 300
V
TRANS
= 18V
V
TRANS
= 6VV
TRANS
= 12V
TIME (SECONDS)
0
0
V
OUT
(V)
50
100
150
200
250
300
0.2 0.4 0.6 0.8
3750 TA02c
1.0
V
TRANS
= 18V
V
TRANS
= 6V
V
TRANS
= 12V
3A Charging Efficiency 3A Charge Time
NMOS DRAIN
CURRENT
1A/DIV
NMOS DRAIN
VOLTAGE
20V/DIV
5µs/DIV
3750 TA02d
Typical Switching Waveforms

LT3750EMS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Cap Chr Cntr
Lifecycle:
New from this manufacturer.
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