9
LT3750
3750fa
APPLICATIO S I FOR ATIO
WUUU
output capacitor is almost completely charged and is
given by:
I
IV
VNV
AVG D
PK TRANS
OUT PK TRANS
,
()
•
•
=
+
()
2
The output diode’s continuous forward current rating
must exceed I
AVG,D
.
At a minimum, the diode must satisfy all the previously
mentioned specifications to guarantee proper operation.
However, to optimize charge time, reverse recovery time
and reverse bias leakage current should be considered.
Excessive diode reverse recovery times can cause appre-
ciable discharging of the output capacitor thereby in-
creasing charge time. Choose a diode with a reverse
recovery time of less than 100ns. Diode leakage current
under high reverse bias bleeds the output capacitor of
charge, also increasing charge time. Choose a diode that
has minimal reverse bias leakage current. Table 2 recom-
mends several output diodes for various output voltages
with adequate reverse recovery time.
can result in improper operation. This most often mani-
fests itself in two ways. The first is when the primary wind-
ing current looks distorted instead of triangular. This
substantially reduces the efficiency and increases the
charge time. The second way is when the LT3750 fails to
detect discontinuous mode after the first switching cycle.
Both of these problems are solved by increasing the amount
of capacitive bypassing for the transformer. Choose ca-
pacitors that can handle the high RMS ripple currents
common in flyback regulators.
Output Capacitor Selection
For photoflash applications, the output capacitor will be
discharged into a Xenon flash bulb. Only a pulse capacitor
or photoflash capacitor is able to survive such a harsh
event. Igniting a typical Xenon bulb requires approxi-
mately 250V to 350V stored on a capacitor on the order of
hundreds of microfarads.
Table 3. Recommended Output Capacitor Vendors
VENDOR WEBSITE
Rubycon www.rubycon.com
Cornell Dubilier www.cornell-dubilier.com
NWL www.nwl.com
NMOS Selection
Choose an external NMOS with minimal gate charge and
on resistance that satisfies current limit and voltage break-
down requirements. The gate is nominally driven to V
CC
–
2V during each charge cycle. Ensure that this does not
exceed the maximum gate to source voltage rating of the
NMOS but enhaces the channel enough to minimize the on
resistance. Similarly, the maximum drain-source voltage
rating of the NMOS must exceed V
TRANS
+ V
OUT
/N or the
magnitude of the leakage inductance spike, whichever is
greater. The maximum instantaneous drain current must
exceed current limit. Because the switching period de-
creases with output voltage, the average current through
the NMOS is greatest when the output is nearly charged
and is given by:
I
IV
VNV
AVG M
PK OUT PK
OUT PK TRANS
,
()
()
•
•
=
+
()
2
Table 2. Recommended Output Diodes
PEAK
REPETITIVE
REVERSE
PART I
DC
VOLTAGE
MANUFACTURER NUMBER (A) (V) PACKAGE
Diodes Inc. MURS140 1 400 SMB
(www.diodes.com) MURS160 1 600 SMB
ES2G 2 400 SMB
US1M 1 1000 SMA
Philips BYD147 1 400 SOD87
(www.semiconductors. BYD167 1 500 SOD87
philips.com)
Bypass Capacitor Selection
Use a high quality X5R or X7R dielectric ceramic capacitor
placed close to the LT3750 to locally bypass the V
CC
and
V
TRANS
pins. For most applications, a 1µF to 10µF ceramic
capacitor should suffice for V
CC
and a 1µF to 10µF for the
V
TRANS
pin.
The high peak currents flowing through the transformer
necessitate a larger (>>10µF) capacitor to bypass the pri-
mary winding of the transformer. Inadequate bypassing
