IRFL024ZPbF
2 www.irf.com
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C, L = 2.8mH
R
G
= 25Ω, I
AS
= 3.1A, V
GS
=10V.
Part not recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
C
oss
eff. is a fixed capacitance that gives the same
charging time as C
oss
while V
DS
is rising from 0 to 80%
V
DSS
.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical
repetitive avalanche performance.
This value determined from sample failure population.
100% tested to this value in production.
When mounted on 1 inch square copper board.
When mounted on FR-4 board using minimum
recommended footprint.
S
D
G
ec
r
ca
arac
er
s
cs
J
=
un
ess
o
erw
se
spec
e
Parameter Min. T
p. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage 55 ––– ––– V
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient ––– 0.053 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 46.2 57.5
mΩ
V
GS(th)
Gate Threshold Voltage 2.0 ––– 4.0 V
gfs Forward Transconductance 6.2 ––– ––– S
I
DSS
Drain-to-Source Leakage Current ––– ––– 20 µA
––– ––– 250
I
GSS
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Q
g
Total Gate Charge ––– 9.1 14
Q
gs
Gate-to-Source Charge ––– 1.9 ––– nC
Q
gd
Gate-to-Drain ("Miller") Charge ––– 3.9 –––
t
d(on)
Turn-On Delay Time ––– 7.8 –––
t
r
Rise Time ––– 21 ––– ns
t
d(off)
Turn-Off Delay Time ––– 30 –––
t
f
Fall Time ––– 23 –––
C
iss
Input Capacitance ––– 340 –––
C
oss
Output Capacitance ––– 68 –––
C
rss
Reverse Transfer Capacitance ––– 39 ––– pF
C
oss
Output Capacitance ––– 210 –––
C
oss
Output Capacitance ––– 55 –––
C
oss
eff.
Effective Output Capacitance ––– 93 –––
Source-Drain Ratin
s and Characteristics
Parameter Min. T
p. Max. Units
I
S
Continuous Source Current ––– ––– 5.1
(Body Diode) A
I
SM
Pulsed Source Current ––– ––– 41
(Body Diode)
V
SD
Diode Forward Voltage ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 15 23 ns
Q
rr
Reverse Recovery Charge ––– 9.8 15 nC
t
on
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
V
GS
= 10V
V
DD
= 28V
I
D
= 3.1A
R
G
= 53 Ω
T
J
= 25°C, I
S
= 3.1A, V
GS
= 0V
T
J
= 25°C, I
F
= 3.1A, V
DD
= 28V
di/dt = 100A/µs
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 3.1A
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
showing the
integral reverse
p-n junction diode.
V
DS
= 25V, I
D
= 3.1A
I
D
= 3.1A
V
DS
= 44V
Conditions
V
GS
= 10V
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz
V
GS
= 20V
V
GS
= -20V