74HC191 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 3 January 2017 9 of 22
NXP Semiconductors
74HC191
Presettable synchronous 4-bit binary up/down counter
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 18.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
t
pd
propagation
delay
CP to Qn; see Figure 10
[1]
V
CC
= 2.0 V - 72 220 - 275 - 330 ns
V
CC
= 4.5 V - 26 44 - 55 - 66 ns
V
CC
= 5.0 V; C
L
=15pF - 22 - - - - - ns
V
CC
= 6.0 V - 21 37 - 47 - 56 ns
CP to TC; see Figure 10
V
CC
= 2.0 V - 83 255 - 320 - 395 ns
V
CC
= 4.5 V - 30 51 - 64 - 77 ns
V
CC
= 6.0 V - 24 43 - 54 - 65 ns
CP to RC
; see Figure 11
V
CC
= 2.0 V - 47 150 - 190 - 225 ns
V
CC
= 4.5 V - 17 30 - 38 - 45 ns
V
CC
= 6.0 V - 14 26 - 33 - 38 ns
CE
to RC; see Figure 11
V
CC
= 2.0 V - 33 130 - 165 - 195 ns
V
CC
= 4.5 V - 12 26 - 33 - 39 ns
V
CC
= 6.0 V - 10 22 - 28 - 33 ns
Dn to Qn; see Figure 12
V
CC
= 2.0 V - 61 220 - 275 - 330 ns
V
CC
= 4.5 V - 22 44 - 55 - 66 ns
V
CC
= 6.0 V - 18 37 - 47 - 56 ns
PL
to Qn; see Figure 13
V
CC
= 2.0 V - 61 220 - 275 - 330 ns
V
CC
= 4.5 V - 22 44 - 55 - 66 ns
V
CC
= 6.0 V - 18 37 - 47 - 56 ns
U
/D to TC; see Figure 14
V
CC
= 2.0 V - 44 190 - 240 - 285 ns
V
CC
= 4.5 V - 16 38 - 48 - 57 ns
V
CC
= 6.0 V - 13 32 - 41 - 48 ns
U
/D to RC; see Figure 14
V
CC
= 2.0 V - 50 210 - 265 - 315 ns
V
CC
= 4.5 V - 18 42 - 53 - 63 ns
V
CC
= 6.0 V - 14 36 - 45 - 54 ns
t
t
transition
time
see Figure 15
[2]
V
CC
=2.0V - 19 75 - 95 - 110 ns
V
CC
=4.5V - 7 15 - 19 - 22 ns
V
CC
=6.0V - 6 13 - 16 - 19 ns
74HC191 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 3 January 2017 10 of 22
NXP Semiconductors
74HC191
Presettable synchronous 4-bit binary up/down counter
t
W
pulse width CP; HIGH or LOW;
see Figure 10
V
CC
= 2.0 V 125 28 - 155 - 195 - ns
V
CC
=4.5V 25 10 - 31 - 39 - ns
V
CC
=6.0V 21 8 - 26 - 33 - ns
PL
; LOW; see Figure 15
V
CC
= 2.0 V 100 22 - 125 - 150 - ns
V
CC
=4.5V 20 8 - 25 - 30 - ns
V
CC
=6.0V 17 6 - 21 - 26 - ns
t
rec
recovery
time
PL to CP; see Figure 15
V
CC
=2.0V 35 8 - 45 - 55 - ns
V
CC
=4.5V 7 3 - 9 - 11 - ns
V
CC
=6.0V 6 2 - 8 - 9 - ns
t
su
set-up time U/D to CP; see Figure 17
V
CC
= 2.0 V 205 50 - 255 - 310 - ns
V
CC
=4.5V 41 18 - 51 - 62 - ns
V
CC
=6.0V 35 14 - 43 - 53 - ns
Dn to PL
; see Figure 16
V
CC
= 2.0 V 100 19 - 125 - 150 - ns
V
CC
=4.5V 20 7 - 25 - 30 - ns
V
CC
=6.0V 17 6 - 21 - 26 - ns
CE
to CP; see Figure 17
V
CC
= 2.0 V 140 44 - 175 - 210 - ns
V
CC
=4.5V 28 16 - 35 - 42 - ns
V
CC
=6.0V 24 13 - 30 - 36 - ns
t
h
hold time U/D to CP; see Figure 17
V
CC
=2.0V 0 39 - 0 - 0 - ns
V
CC
=4.5V 0 14 - 0 - 0 - ns
V
CC
=6.0V 0 11 - 0 - 0 - ns
Dn to PL
; see Figure 16
V
CC
=2.0V 0 11 - 0 - 0 - ns
V
CC
=4.5V 0 4- 0 - 0 -ns
V
CC
=6.0V 0 3- 0 - 0 -ns
CE
to CP; see Figure 17
V
CC
=2.0V 0 28 - 0 - 0 - ns
V
CC
=4.5V 0 10 - 0 - 0 - ns
V
CC
=6.0V 0 8- 0 - 0 -ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 18.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC191 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 3 January 2017 11 of 22
NXP Semiconductors
74HC191
Presettable synchronous 4-bit binary up/down counter
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] t
t
is the same as t
THL
and t
TLH
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
11. Waveforms
f
max
maximum
frequency
CP; see Figure 10
V
CC
= 2.0 V 4.0 11 - 3.2 - 2.6 - MHz
V
CC
=4.5V 20 33 - 16 - 13 - MHz
V
CC
= 5.0 V; C
L
=15pF - 36 - - - - - MHz
V
CC
=6.0V 24 39 - 19 - 15 - MHz
C
PD
power
dissipation
capacitance
V
I
= GND to V
CC
; V
CC
=5V;
f
i
=1MHz
[3]
-31- - - - -pF
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 18.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
Measurement points are given in Table 9.
Logic levels V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 10. The clock input (CP) to outputs (Qn, TC) propagation delays, clock pulse width and maximum clock
frequency
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9
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9
2+
9
2/
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7&
RXWSXW
&3
LQSXW
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9
0
9
0
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:
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3+/

74HC191PW,118

Mfr. #:
Manufacturer:
Nexperia
Description:
Counter ICs SYNC BIN U/D COUNTER
Lifecycle:
New from this manufacturer.
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