MAX13038ATI+ Datasheet MAX13037ATX+, MAX13038ATI+, MAX13037ATX+T | P13-P15

MAX13037/MAX13038

Automotive Contact Monitor and

Level Shifters with LDO Regulator

______________________________________________________________________________________ 13

Mechanical Switch Inputs (IN0–IN7)

IN0–IN7 are the inputs for remote mechanical switches.

The status of each switch input is indicated by the SW0

through SW7 bits in the status register, and each switch

input can be programmed to not assert an interrupt

(INT) by writing to the P0–P7 bits in the command reg-

ister. All switch inputs are configured to assert an inter-

rupt upon power-up.

The first four inputs (IN0–IN3) are intended for ground-

connected switches. The remaining four inputs (IN4–IN7)

can be programmed in sets of two for either ground-con-

nected or battery-connected switches by writing to the

M0 and M1 bits (see Table 5). The default state after

power-up is IN2–IN7 configured for ground-connected

switches, and IN0/IN1 configured for direct inputs.

All switch inputs have internal 16kΩ sense resistors to

detect switch transitions. Inputs configured for ground-

connected switches are pulled up to BAT and inputs con-

figured for battery-connected switches are pulled down to

GND. Figure 5 shows the switch input structure for IN0

and IN1. IN0 and IN1 can be programmed as direct

inputs with level-shifted outputs (DO0 and DO1) by clear-

ing the WEND bit in the command register (normal mode

only). When programmed as direct inputs, IN0 and IN1

can be used for PWM or other signaling. Clearing the

WEND bit disables the sense resistors and wetting cur-

rents on IN0 and IN1. When programmed as direct inputs,

the status of IN0 and IN1 is not reflected in the status reg-

ister, and interrupts are not allowed on these inputs.

Switch Threshold Levels and

Hysteresis (BATREF, HYST)

Input thresholds for the remote switches are 50% of the

voltage applied to BATREF. The BATREF input is typical-

ly connected to the battery voltage before the reverse-

battery protection diode. The MAX13037/MAX13038

feature adjustable hysteresis on the switch inputs by

connecting an external 0 to 900kΩ resistor from HYST to

ground (normal mode only). Short HYST to ground to

obtain the maximum hysteresis of (0.5 x V

BATREF

). The

approximate formula for hysteresis is given below:

To reduce power consumption, the adjustable hystere-

sis can be disabled by setting [SC2:SC1:SC0 = 1:1:0]

in the command register. When the adjustable hystere-

sis is disabled, the hysteresis is set to 0.166 x V

BATREF.

Switch Debounce and Deglitch

The switch inputs IN0–IN7 share a common program-

mable debounce timer to increase the noise immunity

of the system in normal and scan mode. The switch

debounce time is set by connecting a capacitor

between the t

DEB

input and ground. The minimum

value of this capacitor is 500pF and the maximum value

is 10nF, corresponding to a debounce time of 5ms to

100ms respectively. To calculate other debounce times

the following formula should be used:

C(nF) = t

DEB

(ms) / 10

All switch input glitches of less than 20µs in duration are

automatically rejected by the MAX13037/MAX13038.

Debounce in Normal Mode

When a change of state occurs at the switch input the

debounce timer starts. If the new state is stable for at least

DEB

, the status register is updated and an interrupt is

generated (if enabled). If the input returns to its previous

state before the debounce time has elapsed, an interrupt

is not generated and the status register is not updated.

Debounce in Scan Mode

A change of state at the switch input causes the device to

automatically enter normal mode and the debounce timing

to start. The device remains in normal mode as long as the

input state differs from the previous state. As soon as the

debounce time ends, the status register is updated, an

interrupt is generated, and the device re-enters scan mode.

If the input returns to its previous state before the end

of the debounce time, the device re-enters scan mode,

an interrupt is not generated, and the status register is

not updated.

HYST

HYST(k )

BATREF

⎡

⎣

⎢

⎤

⎦

⎥

0 166

123

(( )

()

MAX13037

MAX13038

16kΩ*

NOTES:

*WETTING CURRENT AND PULLUP/DOWN RESISTORS ARE

CONTROLLED BY THE WEN AND WEND BITS IN THE COMMAND

WETTING*

CURRENT

IN0, IN1

BAT

CONTROL

LOGIC

Figure 5. Input Structure of IN0 and IN1

MAX13037/MAX13038

Automotive Contact Monitor and

Level Shifters with LDO Regulator

14 ______________________________________________________________________________________

Wetting Current (WET)

The MAX13037/MAX13038 feature adjustable wetting

current to any closed switch to clean switch contacts

that are exposed to adverse conditions. The wetting

current is set by connecting a 30kΩ to 330kΩ resistor

from WET to ground. A 30kΩ resistor corresponds to a

wetting current of 40mA (typ) and a 330kΩ resistor cor-

responds to a 4mA (typ) wetting current. See the

Typical Operating Characteristics

section for the rela-

tionship between the wetting current and R

WET

The WEN and WEND bits in the command register

enable and disable the wetting currents and the

WTOFF bit allows the wetting current to be activated for

a duration of 20ms (typ) (see the

Command Register

section). Disabling wetting currents, or limiting the

active wetting current time reduces power consump-

tion. The default state upon power-up is all wetting cur-

rents disabled.

Wetting current is activated on closed switches just

after the debounce time. The wetting current pulse

starts after the debounce time. A wetting current pulse

is provided to all closed switches when a valid input

change is detected. Wetting current rise and fall times

are controlled to enhance EMC performance. There is

one wetting current timer for all switch inputs.

Therefore, it is possible to observe wetting pulses

longer than expected whenever two switches turn on in

sequence and are spaced out less than t

WET

. In scan

mode, the wetting current is enabled during the polling

pulse only.

When using wetting currents, special care must be

taken to avoid exceeding the maximum power dissipa-

tion of the MAX13037/MAX13038 (see the

Applications

Information

section).

Switch Outputs (DO0, DO1)

DO0 and DO1 are direct level-shifted outputs of the

switch inputs IN0 and IN1 when the WEND bit of the

command register is cleared and when operating in

normal mode. When configured as direct inputs, the

wetting currents and sensing resistors are disabled on

IN0 and IN1. DO0 and DO1 are three-stated when the

WEND bit is set or when operating in scan mode.

When programmed as direct inputs, the status of IN0

and IN1 are not reflected in the status register and

interrupts are not allowed on these inputs.

Interrupt Output (

INT

)

INT is an active-low, open-drain output that asserts

when any of the switch inputs change state, as long as

the particular input is enabled for interrupts (set by

clearing P7–P0 in the command register). INT also

asserts when the first watchdog timeout period elapses

WD1

). A pullup resistor to V

is needed on INT. INT is

cleared when CS is driven low for a read/write operation.

The INT output still asserts when V

is disabled pro-

vided that it is pulled up to a different supply voltage.

Thermal Protection (

)

The MAX13037/MAX13038 feature a two-level thermal

protection strategy that prevents the device from being

damaged by overheating. At the initial warning temper-

ature of +135°C (typ), only wetting currents are dis-

abled. The MAX13037/MAX13038 return to normal

operation after the internal temperature decreases

below +120°C (typ). This protection feature is disabled

when WEN = 0 or when all inputs are open. At the sec-

ond thermal warning temperature of +170°C (typ), the

LDO is shut down. Because a µC is often supplied by

the LDO, an overheating event caused by excessive

power dissipation related to I/O wetting currents is nor-

mally resolved without affecting the µC status.

An open-drain, active-low output (OT) asserts low when

the internal temperature of the device rises above the

thermal warning threshold. OT is immediately cleared

when the CS input is driven low for read/write opera-

tions, regardless of whether the temperature is above

the threshold, or not. The overtemperature status of the

MAX13037/MAX13038 can also be monitored by read-

ing the OT bit in the status register. The OT bit is set

when the internal temperature rises above the tempera-

ture threshold, and it is cleared when the temperature

falls below the temperature hysteresis level. This allows

a µC to monitor the overtemperature status, even if the

OT output has been cleared. See Figure 6 for an exam-

ple timing diagram of the overtemperature alerts.

If desired, the OT and INT outputs can be connected

to the same µC GPIO in a wired-OR configuration to

save a µC pin. The OT output still asserts when V

absent provided that it is pulled up to a different sup-

ply voltage.

TEMPERATURE

OT BIT

Figure 6. Example Timing Diagram of the Overtemperature Alerts

MAX13037/MAX13038

Automotive Contact Monitor and

Level Shifters with LDO Regulator

______________________________________________________________________________________ 15

Serial Peripheral Interface

(

, SD0, SDI, CLK)

The MAX13037/MAX13038 operate as a Serial Peripheral

Interface (SPI) slave devices. An SPI master accesses

the MAX13037/MAX13038 by reading from a status reg-

ister and writing to a command register. Both registers

are 16 bits long and are accessed most significant bit

(MSB) first.

On the falling edge of CS, the status register is immedi-

ately loaded to an internal shift register and the con-

tents are transferred out of the SDO output on the rising

edge of CLK. Serial data on the SDI input is latched

into the shift register on the falling edge of CLK. On the

rising edge of CS, the contents of the shift register are

copied to the command register (see Figure 7). The

status and command registers are 16 bits wide, so it is

essential to clock a total of 16 bits while CS is low for

the input and output data to be valid. When CS is high,

the SDO output is high-impedance and any transitions

on CLK and SDI are ignored. The INT and OT flags are

cleared on the CS falling edge. Input status changes

occurring during the CS reading/writing operation are

allowed. If a switch status changes when CS is low, the

interrupt is asserted as usual. This allows the part to be

used even if V

is disabled provided that the INT out-

put is pulled up to another supply voltage.

Status Register

The status register contains the status of the switches

connected to IN7 through IN0 and it also contains an

overtemperature warning bit (see Table 1). The status

Notes:

Bits 15–8: Switch 7 Through 0 Status (SW7–SW0)

SW7 through SW0 reflect the status of the switches

connected to inputs IN7 through IN0, respectively.

Open switches are returned as a [0] and closed switch-

es are returned as a [1].

Bit 7: Overtemperature Warning (OT)

The OT bit returns a [1] when the internal temperature of

the MAX13037/MAX13038 is above the temperature

warning threshold of +135°C (typ). The OT bit returns a

[0] when the MAX13037/MAX13038 is either below the

temperature threshold, or it has fallen below the tempera-

ture hysteresis level following an overtemperature event.

Bits 6–0: Unused

Bits 6 through 0 are unused and should be ignored.

Command Register

The command register is used to configure the

MAX13037/MAX13038 for various modes of operation

and is accessed by an SPI-compatible master (see

Table 2). The power-on reset (POR) value of the com-

mand register is 0x00.

CLK

* = UNUSED.

SDI

SDO

STATUS REGISTER

IS COPIED TO

SHIFT REGISTER

SHIFT REGISTER IS

COPIED TO COMMAND

14131211109876543210

WTOFF

SC2 SC1 SC0 WEN WEND M1 M0 P7 P6 P5 P4 P3 P2 P1 P0

SW7 SW6 SW5 SW4 SW3 SW2 SW1 SW0 OT * * * * * * *

Figure 7. SPI Read/Write Example

Table 1. Status Register

BIT 151413121110 9 8 7 6 5 4 3 2 1 0

NAME SW7 SW6 SW5 SW4 SW3 SW2 SW1 SW0 OT — — — — — — —

Table 2. Command Register

BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

NAME WTOFF SC2 SC1 SC0 WEN WEND M1 M0 P7 P6 P5 P4 P3 P2 P1 P0

POR 0 0000 0 0000000000

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P22

MAX13038ATI+

Mfr. #:

Buy MAX13038ATI+

Manufacturer:

Maxim Integrated

Description:

Interface - Specialized Auto Contact Monitor & Level Shift w/LDO

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MAX13038ATI+

MAX13038ATI+

Products related to this Datasheet