17
FN9074.2
February 8, 2011
GPADA - GPAD ACCUMULATOR
GPADA is a 32 bit register that holds the total accumulated
value measured on the GPAD/IO1 pin. GPADA is
incremented by the value in GPADres every 0.5s as long as
the function is enabled by the AccV bit in the AccumCtrl
register.
The GAPDA register will rollover if it is allowed to count
beyond 0xFFFFFFFF, so proper register maintenance by the
host system is necessary. The GAPDA register may be
cleared by setting the “CLR6” bit in the ACCclr register.
GPADT - GPAD TIME COUNT REGISTER
GPADT records elapsed time for which measurements are
taken on the GPAD pin. GPADT is incremented at a rate of
2Hz for as long as GPAD accumulation is enabled.
Time accumulation in the GPADT register is not expected to
rollover over the life of the battery pack. If desired, the
GPADT register may be cleared by setting the “CLR7” bit in
the ACCclr register.
A/D CONFIGURATION REGISTER – ADconfig
(Address - 43 Hex/67 Decimal)
76543210
ADEN Samp Reserved SampDiv (2:0)
ADEN Master A/D enable: When set to a ‘1’, A/D
conversions can be performed. All A/D
conversions are disabled when it is cleared to ‘0’.
Samp Sample Mode enable: This bit controls the
enabling of Sample mode when the ISL6295 is
not in a Power-on Reset, Sample-Sleep, or
Shelf-Sleep mode. When set to ‘1’, Sample
Mode is enabled and conversions will be
performed at a periodic rate determined by the
programming of the “SampDiv” bits. When
cleared, Sample Mode is disabled and the
ISL6295 will operate in Run Mode.
Reserved Reserved bit.
SampDiv The SampDiv bits define the time interval
between executing an A/D conversion cycle
sequence during Sample mode. The time
interval between each conversion cycle is
defined by: 2^(SampDiv) * 0.5s
Note that if the time taken to complete an A/D
conversion cycle is more than the defined
interval, the time-overlapped pending
conversion cycle(s) will be skipped until the
previous conversion cycle is complete. For
example, if SampDiv = 2, but the time taken to
complete a conversion cycle is 5s, then the
effective conversion time interval will be 6s.
ACCUMULATOR CONTROL REGISTER – AccCtrl
(Address - 63 Hex/99 Decimal)
7 6543210
Accum Accl AccT AccV tsel Reserved
Accum Accumulator Master Enable: Master enable
control for all accumulators. If any combination
of “Accl”, “AccT” and “AccV” are enabled,
“Accum” must also be enabled to permit
accumulation. If “Accum” is ‘0’, no accumulation
will occur regardless of the settings of “Accl”,
“AccT” and “AccV”.
Accl Current Accumulation enable: When set to ‘1’,
current accumulation is enabled. The DCA and
CCA registers will periodically add the value of
the Ires register to its accumulated result. Also,
the DTC and CTC elapsed time counters will
count during discharge and charge respectively.
When “AccI” is cleared to ‘0’, current
accumulation is disabled.
AccT Temperature Accumulation enable: When set to
‘1’, accumulation will be enabled in the TA. TA
will accumulate results from either ITres or
ETres register, depending on the setting of the
“tsel” bit. While enabled, the TAT eapsed time
counter will increment. When “AccT” is cleared
to ‘0’, TA accumulation will be disabled.
AccV GPAD Voltage Accumulation enable: When set
to ‘1’, accumulation in GPADA will be updated
by results from the GPADres register. While
enabled, the GPADT elapsed time counter will
increment. When “AccV” is cleared to ‘0’,
GPADA accumulation will be disabled.
tsel Temperature Accumulation selection: Selects
temperature sensing source used for
accumulation.
0 = internal temperature sensor is used
1 = external temperature sensor is used
Reserved Reserved bit.
ISL6295
