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CAT28F512G90

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
1
Doc. No. MD-1084, Rev. K
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
I/O
0
–I/O
7
I/O BUFFERS
CE, OE LOGIC
SENSE
AMP
DATA
LATCH
ERASE VOLTAGE
SWITCH
PROGRAM VOLTAGE
SWITCH
COMMAND
REGISTER
CE
OE
WE
VOLTAGE VERIFY
SWITCH
ADDRESS LATCH
Y-DECODER
X-DECODER
Y-GATING
524,288 BIT
MEMORY
ARRAY
A
0
–A
15
BLOCK DIAGRAM
DESCRIPTION
The CAT28F512 is a high speed 64K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and EEPROM devices. Programming and Erase
are performed through an operation and verify algo-
rithm. The instructions are input via the I/O bus, using a
two write cycle scheme. Address and Data are latched
to free the I/O bus and address bus during the write
operation.
The CAT28F512 is manufactured using Catalyst’s ad-
vanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
FEATURES
■ Fast Read Access Time: 90/120/150 ns
■ Low Power CMOS Dissipation:
–Active: 30 mA max (CMOS/TTL levels)
–Standby: 1 mA max (TTL levels)
–Standby: 100 µA max (CMOS levels)
■ High Speed Programming:
–10 µs per byte
–1 Sec Typ Chip Program
■ 12.0V ± 5% Programming and Erase Voltage
■ Electronic Signature
■ Commercial, Industrial and Automotive
Temperature Ranges
■ Stop Timer for Program/Erase
■ On-Chip Address and Data Latches
■ JEDEC Standard Pinouts:
–32-pin DIP
–32-pin PLCC
–32-pin TSOP ( 8 x 20)
■ 100,000 Program/Erase Cycles
■ 10 Year Data Retention
■ "Green" Package Options Available
512K-Bit CMOS Flash Memory
Licensed Intel
second source
CAT28F512
CAT28F512
2
Doc. No. MD-1084, Rev. K
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
V
SS
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
12
A
15
NC
V
PP
V
CC
WE
NC
A
14
A
13
A
8
A
9
A
11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
V
SS
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
12
A
15
NC
V
PP
V
CC
WE
NC
A
14
A
13
A
8
A
9
A
11
I/O
0
I/O
1
I/O
2
V
SS
I/O
6
I/O
5
I/O
4
I/O
3
13
14
15
16
20
19
18
17
9
10
11
12
24
23
22
21
A
3
A
2
A
1
A
0
OE
A
10
CE
I/O
7
A
7
A
6
A
5
A
4
5
6
7
8
1
2
3
4
V
PP
NC
A
15
A
12
A
13
A
8
A
9
A
11
28
27
26
25
32
31
30
29
V
CC
WE
N/C
A
14
A
7
A
6
A
5
A
4
5
6
7
8
A
3
A
2
A
1
A
0
9
10
11
12
I/O
0
13
A
14
A
13
A
8
A
9
29
28
27
26
A
11
OE
A
10
CE
25
24
23
22
I/O
7
21
I/O
1
I/O
2
V
SS
I/O
3
I/O
4
I/O
5
I/O
6
14 15 16 17 18 19 20
4321323130
A
12
A
15
NC
V
PP
V
CC
WE
N/C
PIN CONFIGURATION
28F512 F03
TSOP Package (Reverse Pinout) (TR, HR)
PIN FUNCTIONS
Pin Name Type Function
A
0
–A
15
Input Address Inputs for
memory addressing
I/O
0
–I/O
7
I/O Data Input/Output
CE Input Chip Enable
OE Input Output Enable
WE Input Write Enable
V
CC
Voltage Supply
V
SS
Ground
V
PP
Program/Erase
Voltage Supply
28F512 F01
DIP Package (L) PLCC Package (N, G)
TSOP Package (Standard Pinout 8mm x 20mm) (T, H)
CAT28F512
3
Doc. No. MD-1084, Rev. K
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –45°C to +130°C
Storage Temperature....................... –65°C to +150°C
Voltage on Any Pin with
Respect to Ground
(1)
........... –2.0V to +V
CC
+ 2.0V
Voltage on Pin A
9
with
Respect to Ground
(1)
................... –2.0V to +13.5V
V
PP
with Respect to Ground
during Program/Erase
(1)
.............. –2.0V to +14.0V
V
CC
with Respect to Ground
(1)
............ –2.0V to +7.0V
Package Power Dissipation
Capability (T
A
= 25°C) .................................. 1.0 W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current
(2)
........................ 100 mA
RELIABILITY CHARACTERISTICS
Symbol Parameter Min. Max. Units Test Method
N
END
(3)
Endurance 100K Cycles/Byte MIL-STD-883, Test Method 1033
T
DR
(3)
Data Retention 10 Years MIL-STD-883, Test Method 1008
V
ZAP
(3)
ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015
I
LTH
(3)(4)
Latch-Up 100 mA JEDEC Standard 17
CAPACITANCE T
A
= 25°C, f = 1.0 MHz
Limits
Symbol Test Min Max. Units Conditions
C
IN
(3)
Input Pin Capacitance 6 pF V
IN
= 0V
C
OUT
(3)
Output Pin Capacitance 10 pF V
OUT
= 0V
C
VPP
(3)
V
PP
Supply Capacitance 25 pF V
PP
= 0V
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V
CC
+0.5V, which may overshoot to V
CC
+ 2.0V for periods of less than 20ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) This parameter is tested initially and after a design or process change that affects the parameter.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V
CC
+1V.
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

CAT28F512G90

Mfr. #:
Buy CAT28F512G90
Manufacturer:
ON Semiconductor
Description:
NOR Flash 64 X 8 512K 90ns
Lifecycle:
New from this manufacturer.
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