OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

CAT28F512GI90

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
CAT28F512
7
Doc. No. MD-1084, Rev. K
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
FUNCTION TABLE
(1)
Pins
Mode CE OE WE V
PP
I/O Notes
Read V
IL
V
IL
V
IH
V
PPL
D
OUT
Output Disable V
IL
V
IH
V
IH
X High-Z
Standby V
IH
XXV
PPL
High-Z
Signature (MFG) V
IL
V
IL
V
IH
X 31H A
0
= V
IL
, A
9
= 12V
Signature (Device) V
IL
V
IL
V
IH
X B8H A
0
= V
IH
, A
9
= 12V
Program/Erase V
IL
V
IH
V
IL
V
PPH
D
IN
See Command Table
Write Cycle V
IL
V
IH
V
IL
V
PPH
D
IN
During Write Cycle
Read Cycle V
IL
V
IL
V
IH
V
PPH
D
OUT
During Write Cycle
WRITE COMMAND TABLE
Commands are written into the command register in one or two write cycles. The command register can be altered
only when V
PP
is high and the instruction byte is latched on the rising edge of WE. Write cycles also internally latch
addresses and data required for programming and erase operations.
Pins
First Bus Cycle Second Bus Cycle
Mode Operation Address D
IN
Operation Address D
IN
D
OUT
Set Read Write X 00H Read A
IN
D
OUT
Read Sig. (MFG) Write X 90H Read 00 31H
Read Sig. (Device) Write X 90H Read 01 B8H
Erase Write X 20H Write X 20H
Erase Verify Write A
IN
A0H Read X D
OUT
Program Write X 40H Write A
IN
D
IN
Program Verify Write X C0H Read X D
OUT
Reset Write X FFH Write X FFH
Note:
(1) Logic Levels: X = Logic ‘Do not care’ (V
IH
, V
IL
, V
PPL
, V
PPH
)
CAT28F512
8
Doc. No. MD-1084, Rev. K
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
ADDRESSES
CE (E)
OE (G)
WE (W)
DATA (I/O)
HIGH-Z
POWER UP
STANDBY DEVICE AND
ADDRESS SELECTION
OUPUTS
ENABLED
DATA VALID STANDBY
ADDRESS STABLE
OUTPUT VALID
t
AVQV
(t
ACC
)
t
ELQX
(t
LZ
)
t
GLQX
(t
OLZ
)
t
GLQV
(t
OE
)
t
ELQV
(t
CE
)
t
AXQX
(t
OH
)
t
GHQZ
(t
DF
)
t
EHQZ
(t
DF
)
t
AVAV
(t
RC
)
POWER DOWN
HIGH-Z
t
WHGL
READ OPERATIONS
Read Mode
A Read operation is performed with both CE and OE low
and with WE high. V
PP
can be either high or low,
however, if V
PP
is high, the Set READ command has to
be sent before reading data (see Write Operations). The
data retrieved from the I/O pins reflects the contents of
the memory location corresponding to the state of the 16
address pins. The respective timing waveforms for the
read operation are shown in Figure 3. Refer to the AC
Read characteristics for specific timing parameters.
Signature Mode
The signature mode allows the user to identify the IC
manufacturer and the type of device while the device
resides in the target system. This mode can be activated
in either of two ways; through the conventional method
of applying a high voltage (12V) to address pin A
9
or by
sending an instruction to the command register (see
Write Operations).
The conventional mode is entered as a regular READ
mode by driving the CE and OE pins low (with WE high),
and applying the required high voltage on address pin A
9
while all other address lines are held at V
IL
.
A Read cycle from address 0000H retrieves the binary
code for the IC manufacturer on outputs I/O
0
to I/O
7
:
CATALYST Code = 00110001 (31H)
A Read cycle from address 0001H retrieves the binary
code for the device on outputs I/O
0
to I/O
7
.
28F512 Code = 1011 1000 (B8H)
Standby Mode
With CE at a logic-high level, the CAT28F512 is placed
in a standby mode where most of the device circuitry is
disabled, thereby substantially reducing power con-
sumption. The outputs are placed in a high-impedance
state.
Figure 3. A.C. Timing for Read Operation
CAT28F512
9
Doc. No. MD-1084, Rev. K
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
ADDRESSES
CE (E)
OE (G)
WE (W)
DATA (I/O)
V
CC
V
PP
t
WC
t
WC
t
RC
t
CS
t
CH
t
CS
t
CH
t
CH
t
EHQZ
t
DF
t
GHWL
t
WPH
t
WHWH2
t
WHGL
t
WP
t
DS
HIGH-Z
DATA IN
= 20H
DATA IN
= A0H
VALID
DATA OUT
t
DH
t
WP
t
DH
t
DS
t
DS
t
WP
t
DH
t
OLZ
t
OE
t
OH
t
LZ
t
CE
t
VPEL
V
PPH
V
PPL
0V
5.0V
V
CC
POWER-UP
& STANDBY
SETUP ERASE
COMMAND
ERASE
COMMAND
ERASING ERASE VERIFY
COMMAND
ERASE
VERIFICATION
V
CC
POWER-DOWN/
STANDBY
t
AS
t
AH
DATA IN
= 20H
t
WC
WRITE OPERATIONS
The following operations are initiated by observing the
sequence specified in the Write Command Table.
Read Mode
The device can be put into a standard READ mode by
initiating a write cycle with 00H on the data bus. The
subsequent read cycles will be performed similar to a
standard EPROM or EEPROM Read.
Signature Mode
An alternative method for reading device signature (see
Read Operations Signature Mode), is initiated by writing
the code 90H into the command register while keeping
V
PP
high. A read cycle from address 0000H with CE and
OE low (and WE high) will output the device signature.
CATALYST Code = 00110001 (31H)
A Read cycle from address 0001H retrieves the binary
code for the device on outputs I/O
0
to I/O
7
.
28F512 Code = 1011 1000 (B8H)
Figure 4. A.C. Timing for Erase Operation
Erase Mode
During the first Write cycle, the command 20H is written
into the command register. In order to commence the
erase operation, the identical command of 20H has to be
written again into the register. This two-step process
ensures against accidental erasure of the memory con-
tents. The final erase cycle will be stopped at the rising
edge of WE, at which time the Erase Verify command
(A0H) is sent to the command register. During this cycle,
the address to be verified is sent to the address bus and
latched when WE goes low. An integrated stop timer
allows for automatic timing control over this operation,
eliminating the need for a maximum erase timing speci-
fication. Refer to AC Characteristics (Program/Erase)
for specific timing parameters.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

CAT28F512GI90

Mfr. #:
Buy CAT28F512GI90
Manufacturer:
ON Semiconductor
Description:
IC FLASH 512K PARALLEL 32PLCC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet