Electrical characteristics STB13NK60ZT4, STx13NK60Z, STP13NK60ZFP
6/18 Doc ID 8527 Rev 7
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
r
Turn-on delay time
Rise time
V
DD
= 300 V, I
D
= 5 A,
R
G
=4.7 Ω, V
GS
=10 V
(see Figure 20)
-
22
14
-
ns
ns
t
d(off)
t
f
Turn-off delay time
Fall time
V
DD
=300 V, I
D
= 5 A,
R
G
=4.7 Ω, V
GS
=10 V
(see Figure 20)
-
61
12
-
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage rise time
Fall time
Cross-over time
V
DD
=480 V, I
D
= 10 A,
R
G
=4.7 Ω, V
GS
=10 V
(see Figure 20)
-
10
9
20
-
ns
ns
ns
Table 7. Gate-source Zener diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
BV
GSO
Gate-source breakdown
voltage
Igs=±1mA
(open drain)
30 - - V
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
(1)
1. Pulse width limited by safe operating area
Source-drain current
Source-drain current
(pulsed)
-
10
40
A
A
V
SD
(2)
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
Forward on voltage
I
SD
= 10 A, V
GS
=0
-1.6V
t
rr
Q
rr
I
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 10 A,
di/dt = 100 A/µs,
V
DD
=35 V, Tj=150 °C
-
570
4.5
16
ns
µC
A
