SiRC18DP
www.vishay.com
Vishay Siliconix
S17-0903-Rev. B, 12-Jun-17
2
Document Number: 76402
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
a. Package limited
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257
). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 65 °C/W
g. T
C
= 25 °C
Notes
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %
b. Guaranteed by design, not subject to production testing
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYPICAL MAXIMUM UNIT
Maximum junction-to-ambient
b, f
t ≤ 10 s R
thJA
20 25
°C/W
Maximum junction-to-case (drain) Steady state R
thJC
1.8 2.3
SPECIFICATIONS (T
J
= 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage V
DS
V
GS
= 0 V, I
D
= 250 μA 30 - -
V
Gate-source threshold voltage V
GS(th)
V
DS
= V
GS
, I
D
= 250 μA 1 - 2.4
Gate-source leakage I
GSS
V
DS
= 0 V, V
GS
= +20 V, -16 V - - ± 100 nA
Zero gate voltage drain current I
DSS
V
DS
= 30 V, V
GS
= 0 V - 0.06 0.10
mA
V
DS
= 30 V, V
GS
= 0 V, T
J
= 70 °C - 1 10
On-state drain current
a
I
D(on)
V
DS
≥ 5 V, V
GS
= 10 V 40 - - A
Drain-source on-state resistance
a
R
DS(on)
V
GS
= 10 V, I
D
= 15 A - 0.00085 0.00110
Ω
V
GS
= 4.5 V, I
D
= 10 A - 0.00135 0.00154
Forward transconductance
a
g
fs
V
DS
= 10 V, I
D
= 15 A - 70 - S
Dynamic
b
Input capacitance C
iss
V
DS
= 15 V, V
GS
= 0 V, f = 1 MHz
- 5060 -
pFOutput capacitance C
oss
- 2400 -
Reverse transfer capacitance C
rss
- 350 -
C
rss
/C
iss
ratio - 0.069 0.140
Total gate charge Q
g
V
DS
= 15 V, V
GS
= 10 V, I
D
= 10 A - 74 111
nC
V
DS
= 15 V, V
GS
= 4.5 V, I
D
= 10 A
-3553
Gate-source charge Q
gs
-11.8-
Gate-drain charge Q
gd
-8.4-
Gate resistance R
g
f = 1 MHz 0.1 0.5 0.9 Ω
Turn-on delay time t
d(on)
V
DD
= 15 V, R
L
= 1.5 Ω, I
D
≅ 10 A,
V
GEN
= 10 V, R
g
= 1 Ω
-1632
ns
Rise time t
r
-2142
Turn-off delay time t
d(off)
-3060
Fall time t
f
-1224
Turn-on delay time t
d(on)
V
DD
= 15 V, R
L
= 1.5 Ω, I
D
≅ 10 A,
V
GEN
= 4.5 V, R
g
= 1 Ω
-3162
Rise time t
r
- 77 154
Turn-off delay time t
d(off)
-3876
Fall time t
f
-3774
Drain-source Body Diode Characteristics
Continuous source-drain diode current I
S
T
C
= 25°C - - 60
A
Pulse diode forward current I
SM
- - 100
Body diode voltage V
SD
I
S
= 5 A, V
GS
= 0 V - 0.41 0.55 V
Body diode reverse recovery time t
rr
I
F
= 10 A, di/dt = 100 A/μs,
T
J
= 25 °C
- 58 116 ns
Body diode reverse recovery charge Q
rr
- 72 144 nC
Reverse recovery fall time t
a
-26-
ns
Reverse recovery rise time t
b
-32-
