CS5171, CS5172, CS5173, CS5174
http://onsemi.com
11
Switch Driver and Power Switch
The switch driver receives a control signal from the logic
section to drive the output power switch. The switch is
grounded through emitter resistors (63 mW total) to the
PGND pin. PGND is not connected to the IC substrate so that
switching noise can be isolated from the analog ground. The
peak switching current is clamped by an internal circuit. The
clamp current is guaranteed to be greater than 1.5 A and
varies with duty cycle due to slope compensation. The
power switch can withstand a maximum voltage of 40 V on
the collector (V
SW
pin). The saturation voltage of the switch
is typically less than 1 V to minimize power dissipation.
Short Circuit Condition
When a short circuit condition happens in a boost circuit,
the inductor current will increase during the whole
switching cycle, causing excessive current to be drawn from
the input power supply. Since control ICs don’t have the
means to limit load current, an external current limit circuit
(such as a fuse or relay) has to be implemented to protect the
load, power supply and ICs.
In other topologies, the frequency shift built into the IC
prevents damage to the chip and external components. This
feature reduces the minimum duty cycle and allows the
transformer secondary to absorb excess energy before the
switch turns back on.
Figure 30. Startup Waveforms of Circuit Shown in
the Application Diagram. Load = 400 mA.
I
L
V
OUT
V
C
V
CC
The CS517x can be activated by either connecting the
V
CC
pin to a voltage source or by enabling the SS pin.
Startup waveforms shown in Figure 30 are measured in the
boost converter demonstrated in the Application Diagram
on the page 2 of this document. Recorded after the input
voltage is turned on, this waveform shows the various
phases during the power up transition.
When the V
CC
voltage is below the minimum supply
voltage, the V
SW
pin is in high impedance. Therefore,
current conducts directly from the input power source to the
output through the inductor and diode. Once V
CC
reaches
approximately 1.5 V, the internal power switch briefly turns
on. This is a part of the CS517x’s normal operation. The
turn−on of the power switch accounts for the initial current
swing.
When the V
C
pin voltage rises above the threshold, the
internal power switch starts to switch and a voltage pulse can
be seen at the V
SW
pin. Detecting a low output voltage at the
FB pin, the built−in frequency shift feature reduces the
switching frequency to a fraction of its nominal value,
reducing the minimum duty cycle, which is otherwise
limited by the minimum on−time of the switch. The peak
current during this phase is clamped by the internal current
limit.
When the FB pin voltage rises above 0.4 V, the frequency
increases to its nominal value, and the peak current begins
to decrease as the output approaches the regulation voltage.
The overshoot of the output voltage is prevented by the
active pull−on, by which the sink current of the error
amplifier is increased once an overvoltage condition is
detected. The overvoltage condition is defined as when the
FB pin voltage is 50 mV greater than the reference voltage.
COMPONENT SELECTION
Frequency Compensation
The goal of frequency compensation is to achieve
desirable transient response and DC regulation while
ensuring the stability of the system. A typical compensation
network, as shown in Figure 31, provides a frequency
response of two poles and one zero. This frequency response
is further illustrated in the Bode plot shown in Figure 32.
CS5171
Figure 31. A Typical Compensation Network
V
C
GND
C1
R1
C2
The high DC gain in Figure 32 is desirable for achieving
DC accuracy over line and load variations. The DC gain of
a transconductance error amplifier can be calculated as
follows:
Gain
DC
+ G
M
R
O
where:
G
M
= error amplifier transconductance;
R
O
= error amplifier output resistance ≈ 1 MW.
The low frequency pole, f
P1,
is determined by the error
amplifier output resistance and C1 as:
f
P1
+
1
2pC1R
O
