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CS5171GDR8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
CS5171, CS5172, CS5173, CS5174
http://onsemi.com
13
Magnetic Component Selection
When choosing a magnetic component, one must consider
factors such as peak current, core and ferrite material, output
voltage ripple, EMI, temperature range, physical size and
cost. In boost circuits, the average inductor current is the
product of output current and voltage gain (V
OUT
/V
CC
),
assuming 100% energy transfer efficiency. In continuous
conduction mode, inductor ripple current is
I
RIPPLE
+
V
CC
(V
OUT
* V
CC
)
(f)(L)(V
OUT)
where:
f = 280 kHz for CS5171/2 and 560 kHz for CS5173/4.
The peak inductor current is equal to average current plus
half of the ripple current, which should not cause inductor
saturation. The above equation can also be referenced when
selecting the value of the inductor based on the tolerance of
the ripple current in the circuits. Small ripple current
provides the benefits of small input capacitors and greater
output current capability. A core geometry like a rod or
barrel is prone to generating high magnetic field radiation,
but is relatively cheap and small. Other core geometries,
such as toroids, provide a closed magnetic loop to prevent
EMI.
Input Capacitor Selection
In boost circuits, the inductor becomes part of the input
filter, as shown in Figure 35. In continuous mode, the input
current waveform is triangular and does not contain a large
pulsed current, as shown in Figure 34. This reduces the
requirements imposed on the input capacitor selection.
During continuous conduction mode, the peak to peak
inductor ripple current is given in the previous section. As
we can see from Figure 34, the product of the inductor
current ripple and the input capacitor’s effective series
resistance (ESR) determine the V
CC
ripple. In most
applications, input capacitors in the range of 10 mF to 100 mF
with an ESR less than 0.3 W work well up to a full 1.5 A
switch current.
V
CC
ripple
Figure 34. Boost Input Voltage and Current
Ripple Waveforms
I
IN
I
L
+
−
Figure 35. Boost Circuit Effective Input Filter
V
CC
C
IN
R
ESR
I
L
I
IN
The situation is different in a flyback circuit. The input
current is discontinuous and a significant pulsed current is
seen by the input capacitors. Therefore, there are two
requirements for capacitors in a flyback regulator: energy
storage and filtering. To maintain a stable voltage supply to
the chip, a storage capacitor larger than 20 mF with low ESR
is required. To reduce the noise generated by the inductor,
insert a 1.0 mF ceramic capacitor between V
CC
and ground
as close as possible to the chip.
Output Capacitor Selection
Figure 36. Typical Output Voltage Ripple
V
OUT
ripple
I
L
By examining the waveforms shown in Figure 36, we can
see that the output voltage ripple comes from two major
sources, namely capacitor ESR and the
charging/discharging of the output capacitor. In boost
circuits, when the power switch turns off, I
L
flows into the
output capacitor causing an instant DV = I
IN
× ESR. At the
same time, current I
L
− I
OUT
charges the capacitor and
increases the output voltage gradually. When the power
switch is turned on, I
L
is shunted to ground and I
OUT
discharges the output capacitor. When the I
L
ripple is small
enough, I
L
can be treated as a constant and is equal to input
current I
IN
.
CS5171, CS5172, CS5173, CS5174
http://onsemi.com
14
Summing up, the output voltage peak−peak ripple can be
calculated by:
V
OUT(RIPPLE)
+
(I
IN
* I
OUT)
(1 * D)
(C
OUT)
(f)
)
I
OUT
D
(C
OUT
)(f)
) I
IN
ESR
The equation can be expressed more conveniently in
terms of V
CC
, V
OUT
and I
OUT
for design purposes as
follows:
V
OUT(RIPPLE)
+
I
OUT
(V
OUT
* V
CC
)
(C
OUT
)(f)
1
(C
OUT
)(f)
)
(I
OUT
)(V
OUT
)(ESR)
V
CC
The capacitor RMS ripple current is:
I
RIPPLE
+ (I
IN
* I
OUT
)
2
(1 * D))(I
OUT
)
2
(D)
Ǹ
+ I
OUT
V
OUT
* V
CC
V
CC
Ǹ
Although the above equations apply only for boost
circuits, similar equations can be derived for flyback
circuits.
Reducing the Current Limit
In some applications, the designer may prefer a lower
limit on the switch current than 1.5 A. An external shunt can
be connected between the V
C
pin and ground to reduce its
clamp voltage. Consequently, the current limit of the
internal power transistor current is reduced from its nominal
value.
The voltage on the V
C
pin can be evaluated with the
equation
V
C
+ I
SW
R
E
A
V
where:
R
E
= .063W, the value of the internal emitter resistor;
A
V
= 5 V/V, the gain of the current sense amplifier.
Since R
E
and A
V
cannot be changed by the end user, the
only available method for limiting switch current below
1.5 A is to clamp the V
C
pin at a lower voltage. If the
maximum switch or inductor current is substituted into the
equation above, the desired clamp voltage will result.
A simple diode clamp, as shown in Figure 37, clamps the
V
C
voltage to a diode drop above the voltage on resistor R3.
Unfortunately, such a simple circuit is not generally
acceptable if V
IN
is loosely regulated.
Figure 37. Current Limiting using a Diode Clamp
V
C
D1
V
CC
R1
V
IN
C2
C1
R2
R3
Another solution to the current limiting problem is to
externally measure the current through the switch using a
sense resistor. Such a circuit is illustrated in Figure 38.
−
+
Figure 38. Current Limiting using a Current Sense
Resistor
V
C
R
SENSE
Q1
V
CC
R1
V
IN
C2
C1
R2
C3
Output
Ground
PGND
AGND
The switch current is limited to
I
SWITCH(PEAK)
+
V
BE(Q1)
R
SENSE
where:
V
BE(Q1)
= the base−emitter voltage drop of Q1, typically
0.65 V.
CS5171, CS5172, CS5173, CS5174
http://onsemi.com
15
The improved circuit does not require a regulated voltage
to operate properly. Unfortunately, a price must be paid for
this convenience in the overall efficiency of the circuit. The
designer should note that the input and output grounds are
no longer common. Also, the addition of the current sense
resistor, R
SENSE
, results in a considerable power loss which
increases with the duty cycle. Resistor R2 and capacitor C3
form a low−pass filter to remove noise.
Subharmonic Oscillation
Subharmonic oscillation (SHM) is a problem found in
current−mode control systems, where instability results
when duty cycle exceeds 50%. SHM only occurs in
switching regulators with a continuous inductor current.
This instability is not harmful to the converter and usually
does not affect the output voltage regulation. SHM will
increase the radiated EM noise from the converter and can
cause, under certain circumstances, the inductor to emit
high−frequency audible noise.
SHM is an easily remedied problem. The rising slope of
the inductor current is supplemented with internal “slope
compensation” to prevent any duty cycle instability from
carrying through to the next switching cycle. In the CS517x
family, slope compensation is added during the entire switch
on−time, typically in the amount of 180 mA/ms.
In some cases, SHM can rear its ugly head despite the
presence of the onboard slope compensation. The simple
cure to this problem is more slope compensation to avoid the
unwanted oscillation. In that case, an external circuit, shown
in Figure 39, can be added to increase the amount of slope
compensation used. This circuit requires only a few
components and is “tacked on” to the compensation
network.
Figure 39. Technique for Increasing Slope
Compensation
V
C
R1
C2
C1
R2
R3
V
SW
C3
V
SW
The dashed box contains the normal compensation
circuitry to limit the bandwidth of the error amplifier.
Resistors R2 and R3 form a voltage divider off of the V
SW
pin. In normal operation, V
SW
looks similar to a square
wave, and is dependent on the converter topology. Formulas
for calculating V
SW
in the boost and flyback topologies are
given in the section “V
SW
Voltage Limit.” The voltage on
V
SW
charges capacitor C3 when the switch is off, causing
the voltage at the V
C
pin to shift upwards. When the switch
turns on, C3 discharges through R3, producing a negative
slope at the V
C
pin. This negative slope provides the slope
compensation.
The amount of slope compensation added by this circuit
is
DI
DT
+ V
SW
ǒ
R
3
R
2
)R
3
Ǔ
ǒ
1 * e
*(1*D)
R
3
C
3
f
SW
Ǔǒ
f
SW
(1 * D)R
E
A
V
Ǔ
where:
DI/DT = the amount of slope compensation added (A/s);
V
SW
= the voltage at the switch node when the transistor
is turned off (V);
f
SW
= the switching frequency, typically 280 kHz
(CS5171/3) or 560 kHz (CS5172/4) (Hz);
D = the duty cycle;
R
E
= 0.063 W, the value of the internal emitter resistor;
A
V
= 5 V/V, the gain of the current sense amplifier.
In selecting appropriate values for the slope compensation
network, the designer is advised to choose a convenient
capacitor, then select values for R2 and R3 such that the
amount of slope compensation added is 100 mA/ms. Then
R2 may be increased or decreased as necessary. Of course,
the series combination of R2 and R3 should be large enough
to avoid drawing excessive current from V
SW
. Additionally,
to ensure that the control loop stability is improved, the time
constant formed by the additional components should be
chosen such that
R
3
C
3
t
1 * D
f
SW
Finally, it is worth mentioning that the added slope
compensation is a tradeoff between duty cycle stability and
transient response. The more slope compensation a designer
adds, the slower the transient response will be, due to the
external circuitry interfering with the proper operation of the
error amplifier.
Soft−Start
Through the addition of an external circuit, a Soft−Start
function can be added to the CS5171/2/3/4 family of
components. Soft−Start circuitry prevents the V
C
pin from
slamming high during startup, thereby inhibiting the
inductor current from rising at a high slope.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

CS5171GDR8

Mfr. #:
Buy CS5171GDR8
Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators 1.5A High Efficiency
Lifecycle:
New from this manufacturer.
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