CS5381-KSZ Datasheet CS5381-KZZ, CS5381-KSZ, CS5381-KSZR | P1-P3

http://www.cirrus.com

120 dB, 192 kHz, Multi-Bit Audio A/D Converter

Features

! Advanced Multi-bit Delta-Sigma Architecture

! 24-bit Conversion

! 120 dB Dynamic Range

! -110 dB THD+N

! Supports All Audio Sample Rates Including

192 kHz

! 260 mW Power Consumption

! High-Pass Filter or DC Offset Calibration

! Supports Logic Levels between 5 and 2.5 V

! Differential Analog Architecture

! Low-Latency Digital Filtering

! Overflow Detection

! Pin-Compatible with the CS5361

General Description

The CS5381 is a complete analog-to-digital converter

for digital audio systems. It performs sampling, analog-

to-digital conversion, and anti-alias filtering - generating

24-bit values for both left and right inputs in serial form

at sample rates up to 216 kHz per channel.

The CS5381 uses a 5th-order, multi-bit delta-sigma

modulator followed by digital filtering and decimation,

which removes the need for an external anti-alias filter.

The ADC uses a differential architecture which provides

excellent noise rejection.

The CS5381 is available in 24-pin TSSOP and SOIC

packages for Commercial grade (-10° to +70° C). The

CDB5381 Customer Demonstration board is also avail-

able for device evaluation and implementation

suggestions. Please refer to the “Ordering Information”

on page 22.

The CS5381 is ideal for audio systems requiring wide

dynamic range, negligible distortion, and low noise -

such as A/V receivers, DVD-R, CD-R, digital mixing

consoles, and effects processors.

Interface Supply

2.5 V to 5 V

Internal Voltage

Reference

Level Translator

Digital Supply

3.3 V to 5 V

Mode

Configuration

Analog Supply

5 V

Switch-Cap

ADC

Differential

Inputs

Digital

Filters

PCM Serial

Audio Output

Switch-Cap

ADC

Differential

Inputs

Digital

Filters

OVFL

HPF

Reset

JULY '05

DS563F2

CS5381

2 DS563F2

CS5381

TABLE OF CONTENTS

1. PIN DESCRIPTIONS ............................................................................................................................... 4

2. CHARACTERISTICS AND SPECIFICATIONS....................................................................................... 5

SPECIFIED OPERATING CONDITIONS .................................................................................................... 5

ABSOLUTE MAXIMUM RATINGS............................................................................................................... 5

ANALOG CHARACTERISTICS (CS5381-KSZ/-KZZ).................................................................................. 6

DIGITAL FILTER CHARACTERISTICS....................................................................................................... 7

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT .................................................................... 10

DC ELECTRICAL CHARACTERISTICS.................................................................................................... 13

DIGITAL CHARACTERISTICS .................................................................................................................. 13

THERMAL CHARACTERISTICS .............................................................................................................. 13

TYPICAL CONNECTION DIAGRAM ......................................................................................................... 14

3. APPLICATIONS .................................................................................................................................... 15

3.1 Operational Mode/Sample Rate Range Select.............................................................................. 15

3.2 System Clocking............................................................................................................................ 15

3.2.1 Master Mode ........................................................................................................................ 15

3.2.2 Slave Mode .......................................................................................................................... 16

3.3 Power-Up Sequence ..................................................................................................................... 16

3.4 Analog Connections ...................................................................................................................... 16

3.5 High-Pass Filter and DC Offset Calibration .................................................................................. 17

3.6 Overflow Detection ........................................................................................................................ 18

3.6.1 OVFL Configuration ............................................................................................................. 18

3.6.2 OVFL Output Timing ............................................................................................................ 18

3.7 Grounding and Power Supply Decoupling..................................................................................... 18

3.8 Synchronization of Multiple Devices.............................................................................................. 18

3.9 Capacitor Size on the Reference Pin (FILT+)................................................................................ 19

4. PACKAGE DIMENSIONS ..................................................................................................................... 20

5. ORDERING INFORMATION ................................................................................................................. 22

7. REVISION HISTORY............................................................................................................................. 24

DS563F2 3

CS5381

LIST OF FIGURES

Figure 1. Single-Speed Mode Stopband Rejection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 2. Single-Speed Mode Transition Band. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 3. Single-Speed Mode Transition Band (Detail). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. Single-Speed Mode Passband Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 5. Double-Speed Mode Stopband Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 6. Double-Speed Mode Transition Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 7. Double-Speed Mode Transition Band (Detail) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 8. Double-Speed Mode Passband Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 9. Quad-Speed Mode Stopband Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 10. Quad-Speed Mode Transition Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 11. Quad-Speed Mode Transition Band (Detail) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 12. Quad-Speed Mode Passband Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 13. Master Mode, Left-Justified SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 14. Slave Mode, Left-Justified SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 15. Master Mode, I²S SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 16. Slave Mode, I²S SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 17. OVFL Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 18. Left-Justified Serial Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 19. I²S Serial Audio Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 20. OVFL Output Timing, I²S Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 21. OVFL Output Timing, Left-Justified Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 22. Typical Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 23. CS5381 Master Mode Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 24. Recommended Analog Input Buffer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 25. CS5381 THD + N versus Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

LIST OF TABLES

Table 1. CS5381 Mode Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 2. CS5381 Common Master Clock Frequencies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 3. CS5381 Slave Mode Clock Ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

CS5381-KSZ

Mfr. #:

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Manufacturer:

Cirrus Logic

Description:

Audio A/D Converter ICs 120dB 192kHz Multi-Bit ADC

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CS5381-KSZ

CS5381-KSZ

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