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IX2113
Figure 1. Typical Connection Diagram
V
BIAS
Supply Voltage (V)
10 12 14 16 18 20
Output Source Current (A)
0
1
2
3
4
5
Output Source Current vs. Voltage
V
BIAS
Supply Voltage (V)
10 12 14 16 18 20
Output Sink Current (A)
0
1
2
3
4
5
Output Sink Current vs. Voltage
V
BIAS
Supply Voltage (V)
10 12 14 16 18 20
High Level Output Voltage (V)
0
1
2
3
4
5
High Level Output Voltage
vs. Supply Voltage
V
CC
Supply Voltage (V)
10 12 14 16 18 20
Low Level Output Voltage (mV)
0
40
80
120
160
200
Low Level Output Voltage
vs. Supply Voltage
V
DD
V
DD
HIN HIN
SD
SD
LIN
LIN
V
SS
V
SS
V
CC
V
CC
COM
LO
V
S
V
B
HO
LOAD
up to 600V
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3 Manufacturing Information
3.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee
proper operation of our devices when handled according to the limitations and information in that standard as well as
to any limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
3.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard
JESD-625.
3.3 Reflow Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of
J-STD-020 must be observed.
3.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable, and the use of a short drying bake may be necessary. Chlorine-based or
Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be
used.
Device Moisture Sensitivity Level (MSL) Rating
IX2113B, IX2113G MSL 1
Device Maximum Temperature x Time
IX2113B 260°C for 30 seconds
IX2113G 245°C for 30 seconds
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3.5 Mechanical Dimensions
3.5.1 IX2113B: 16-Pin SOIC Package
3.5.2 IX2113BTR: Tape & Reel Packaging for 16-Pin SOIC Package
(inches)
mm
DIMENSIONS
NOTES:
1. Coplanarity = 0.1016 (0.004) max.
2. Leadframe thickness does not include solder plating (1000 microinch maximum).
0.406 ± 0.076
(0.016 ± 0.003)
10.211 ± 0.254
(0.402 ± 0.010)
7.493 ± 0.127
(0.295 ± 0.005)
10.312 ± 0.381
(0.406 ± 0.015)
1.270 TYP
(0.050 TYP)
0.254 / +0.051 / -0.025
(0.010 / +0.002 / -0.001)
0.889 ± 0.178
(0.035 ± 0.007)
0.649 ± 0.102
(0.026 ± 0.004)
PIN 1
PIN 16
2.337 ± 0.051
(0.092 ± 0.002)
0.203 ± 0.102
(0.008 ± 0.004)
45º
2.00
(0.079)
1.27
(0.050)
9.40
(0.370)
0.60
(0.024)
Recommended PCB Land Pattern
Dimensions
mm
(inches)
Embossment
Embossed Carrier
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
K
0
=3.20
(0.126)
K
1
=2.70
(0.106)
A
0
=10.90
(0.429)
W=16
(0.630)
B
0
=10.70
(0.421)
P=12.00
(0.472)
NOTES:
1. All dimensions carry tolerances of EIA Standard 481-2
2. The tape complies with all “Notes” for constant dimensions
listed on page 5 of EIA-481-2

IX2113BTR

Mfr. #:
Manufacturer:
IXYS Integrated Circuits
Description:
Gate Drivers 16 Pin SOIC gatedrvr 600v
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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