NL17SZ74USG

© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 11
1 Publication Order Number:
NL17SZ74/D
NL17SZ74
Single D Flip Flop
The NL17SZ74 is a high performance, full function Edge triggered
D Flip Flop, with all the features of a standard logic device such as the
74LCX74.
Features
Extremely High Speed: t
PD
2.6 ns (typical) at V
CC
= 5.0 V
Designed for 1.65 V to 5.5 V V
CC
Operation
5.0 V Tolerant Inputs − Interface Capability with 5.0 V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Replacement for NC7SZ74
Tiny Ultra Small Package Only 2.1 X 3.0 mm
High ESD Ratings: 4000 V Human Body Model
High ESD Ratings: 200 V Machine Model
Chip Complexity: FET = 64
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
TRUTH TABLE
Inputs Outputs
Operating Mode
PR CLR CP D Q Q
L
H
L
H
L
L
X
X
X
X
X
X
H
L
H
L
H
H
Asynchronous Set
Asynchronous Clear
Undetermined
H
H
H
H
h
l
H
L
L
H Load and Read Register
H H X NC NC Hold
H = High Voltage Level
h = High Voltage Level One Setup Time Prior to the Low−to−High
Clock Transition
L = Low Voltage Level
l = Low Voltage Level One Setup Time Prior to the Low−to−High
Clock Transition
NC = No Change
X = High or Low Voltage Level and Transitions are Acceptable
= Low−to−High Transition
= Not a Low−to−High Transition
For I
CC
reasons, DO NOT FLOAT Inputs
www.onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAM
US8
US SUFFIX
CASE 493
PINOUT DIAGRAM
V
CC
PR
CLR
Q
CP
D
Q
GND
1
2
3
4
8
7
6
5
Q
PR
7
5
D
2
CP
1
CLR
6
Q
3
V
CC
= 8, GND = 4
LOGIC DIAGRAM
MH M
G
MH = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
NL17SZ74
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2
MAXIMUM RATINGS
Symbol Parameter Value Units
V
CC
DC Supply Voltage −0.5 to +7.0 V
V
I
DC Input Voltage −0.5 to +7.0 V
V
O
DC Output Voltage − Output in High or Low State (Note 1) −0.5 to V
CC
+0.5 V
I
IK
DC Input Diode Current V
I
< GND −50 mA
I
OK
DC Output Diode Current V
O
< GND −50 mA
I
O
DC Output Sink Current ±50 mA
I
CC
DC Supply Current Per Supply Pin ±100 mA
I
GND
DC Ground Current Per Ground Pin ±100 mA
T
STG
Storage Temperature Range −65 to +150 °C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260 °C
T
J
Junction Temperature Under Bias +150 °C
q
JA
Thermal Resistance (Note 2) 250 °C/W
P
D
Power Dissipation in Still Air at 85°C 250 mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating, Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
>4000
>200
N/A
V
I
LATCHUP
Latchup Performance Above V
CC
and Below GND at 125°C (Note 6) ±100 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm X 1 inch, 2 ounce copper trace with no air flow.
3. Tested to EIA/JESD22−A114−A.
4. Tested to EIA/JESD22−A115−A.
5. Tested to JESD22−C101−A.
6. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Units
V
CC
Supply Voltage
Operating
Data Retention Only
1.65
1.5
5.5
5.5
V
V
I
Input Voltage (Note 7) 0 5.5 V
V
O
Output Voltage (HIGH or LOW State) 0
5.5
V
T
A
Operating Free−Air Temperature −55 +125 °C
Dt/DV
Input Transition Rise or Fall Rate
V
CC
= 2.5 V ±0.2 V
V
CC
= 3.0 V ±0.3 V
V
CC
= 5.0 V ±0.5 V
0
0
0
20
10
5.0
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
7. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.
NL17SZ74
www.onsemi.com
3
ORDERING INFORMATION
Device Package Shipping
NL17SZ74USG US8
(Pb−Free)
3000 / Tape & Reel
NLV17SZ74USG* US8
(Pb−Free)
3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
DC ELECTRICAL CHARACTERISTICS
Symbo
l
Parameter Condition
V
CC
(V)
T
A
= 25_C −55_C 3 T
A
3 125_C
Units
Min Typ Max Min Max
V
IH
High−Level Input Voltage
1.65 0.75 V
CC
0.75 V
CC
V
2.3 to 5.5 0.7 V
CC
0.7 V
CC
V
IL
Low−Level Input Voltage
1.65 0.25 V
CC
0.25 V
CC
V
2.3 to 5.5 0.3 V
CC
0.3 V
CC
V
OH
High−Level Output Voltage
V
IN
= V
IL
or V
IL
I
OH
= 100 mA
I
OH
= −3 mA
I
OH
= −8 mA
I
OH
= −12 mA
I
OH
= −16 mA
I
OH
= −24 mA
I
OH
= −32 mA
1.65 to 5.5
1.65
2.3
2.7
3.0
3.0
4.5
V
CC
− 0.1
1.29
1.9
2.2
2.4
2.3
3.8
V
CC
1.52
2.1
2.4
2.7
2.5
4.0
V
CC
− 0.1
1.29
1.9
2.2
2.4
2.3
3.8
V
V
OL
Low−Level Output Voltage
V
IN
= V
IH
I
OL
= 100 mA
I
OL
= 3 mA
I
OL
= 8 mA
I
OL
= 12 mA
I
OL
= 16 mA
I
OL
= 24 mA
I
OL
= 32 mA
1.65 to 5.5
1.65
2.3
2.7
3.0
3.0
4.5
0.008
0.10
0.12
0.15
0.19
0.30
0.30
0.1
0.24
0.3
0.4
0.4
0.55
0.55
0.1
0.24
0.3
0.4
0.4
0.55
0.55
V
I
IN
Input Leakage Current V
IN
= 5.5 V or
GND
0 to 5.5 ±0.1 ±1.0
mA
I
OFF
Power Off
Leakage Current
V
IN
= 5.5 V or
V
OUT
= 5.5 V
0 1.0 10
mA
I
CC
Quiescent Supply Current V
IN
= 5.5 V or
GND
5.5 1.0 10
mA

NL17SZ74USG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops 1.65-5.5V CMOS Single D-Type
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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