LTC3621HMS8E-23.3#TRPBF

LTC3621/LTC3621-2
7
3621fc
For more information www.linear.com/LTC3621
pin FuncTions
(DFN/MSOP)
block DiagraM
SW (Pin 1/Pin 1): Switch Node Connection to the Inductor
of the Step-Down Regulator.
V
IN
(Pin 2/Pin 2): Input Voltage of the Step-Down Regulator.
RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not
leave this pin floating. Logic high activates the step-down
regulator.
FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier
of the Step-Down Regulator. Connect a resistor divider
tap to this pin. The output voltage can be adjusted from
0.6V to V
IN
by:
V
OUT
= 0.6V • [1 + (R2/R1)]
For Fixed V
OUT
options, connect the FB pin directly to V
OUT
.
PGOOD (Pin 4, MSOP Package Only): V
OUT
within Regu-
lation Indicator.
INTV
CC
(Pin 5/Pin 6): Low Dropout Regulator. Bypass with
at least 1µF to Ground.
MODE/SYNC (Pin 6/Pin 7): Burst Mode Select and External
Clock Synchronization of the Step-Down Regulator. Tie
MODE/SYNC to INTV
CC
for Burst Mode operation with a
400mA peak current clamp, tie MODE/SYNC to GND for
pulse skipping operation, and tie MODE/SYNC to a volt
-
age between 1V and V
INTVCC
– 1.2V for forced continuous
mode. Furthermore, connecting MODE/SYNC to an external
clock will sync the system clock to the external clock and
put the part in forced continuous mode.
GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for
Power and Signal Ground. Must be soldered to PCB ground.
SGND (Pin 8, MSOP Package Only): Signal Ground.
+
+
+
+
V
ERROR
AMPLIFIER
BURST
AMPLIFIER
MAIN
I-COMPARATOR
+
+
OVERCURRENT
COMPARATOR
REVERSE
COMPARATOR
0.6V
FB
ITH
MODE/SYNC
RUN
PGOOD
INTV
CC
CLK
V
IN
– 5V
SW
GND
3621 BD
V
IN
FIXED V
OUT
INTV
CC
OSCILLATOR
LDO
MS8E PACKAGE ONLY
BUCK
LOGIC
AND
GATE DRIVE
SLOPE
COMPENSATION
0.8ms
SOFT-START
LTC3621/LTC3621-2
8
3621fc
For more information www.linear.com/LTC3621
operaTion
The LTC3621 uses a constant-frequency, peak current
mode architecture. It operates through a wide V
IN
range
and regulates with ultralow quiescent current. The opera-
tion frequency is set at either 2.25MHz or 1MHz and can
be synchronized to an external oscillator ±40% of the
inherent frequency
. T
o suit a variety of applications, the
selectable MODE/SYNC pin allows the user to trade off
output ripple for efficiency.
The output voltage is set by an external divider returned to
the FB pin. An error amplifier compares the divided output
voltage with a reference voltage of 0.6V and adjusts the
peak inductor current accordingly. In the MS8E package,
overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage is not within 7.5%
of the programmed value. The PGOOD output will go high
immediately after achieving regulation and will go low 32
clock cycles after falling out of regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle.
The inductor current is allowed to ramp up to a peak level.
Once that level is reached, the top power switch is turned
off and the bottom switch (N-channel MOSFET) is turned
on until the next clock cycle. The peak current level is con
-
trolled by the internally compensated ITH voltage, which is
the output of the error amplifier. This amplifier compares
the FB voltage to the 0.6V internal reference. When the
load current increases, the FB voltage decreases slightly
below the reference, which causes the error amplifier to
increase the ITH voltage until the average inductor current
matches the new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
Low Current Operation
Two discontinuous-conduction modes (DCMs) are available
to control the operation of the LTC3621 at low currents.
Both modes, Burst Mode operation and pulse-skipping,
automatically switch from continuous operation to the
selected mode when the load current is low.
To optimize efficiency, Burst Mode operation can be selected
by tying the MODE/SYNC pin to INTV
CC
. In Burst Mode
operation, the peak inductor current is set to be at least
400mA, even if the output of the error amplifier demands
less. Thus, when the switcher is on at relatively light output
loads, FB voltage will rise and cause the ITH voltage to
drop. Once the ITH voltage goes below 0.2V, the switcher
goes into its sleep mode with both power switches off.
The switcher remains in this sleep state until the external
load pulls the output voltage below its regulation point.
During sleep mode, the part draws an ultralow 3.5µA of
quiescent current from V
IN
.
To minimize V
OUT
ripple, pulse-skipping mode can be se-
lected by grounding the MODE/SYNC pin. In the LTC3621,
pulse-skipping mode is implemented similarly to Burst
Mode operation with the peak inductor current set to be
at about 66mA. This results in lower output voltage ripple
than in Burst Mode operation with the trade-off
being
slightly lower efficiency.
Forced Continuous Mode Operation
Aside from the two discontinuous-conduction modes,
the LTC3621 also has the ability to operate in the forced
continuous mode by setting the MODE/SYNC voltage
between 1V and V
INTVCC
– 1V. In forced continuous mode,
the switcher will switch cycle by cycle regardless of what
the output load current is. If forced continuous mode is
selected, the minimum peak current is set to be –133mA
in order to ensure that the part can operate continuously
at zero output load.
High Duty Cycle/Dropout Operation
When the input supply voltage decreases towards the output
voltage, the duty cycle increases and slope compensation
is required to maintain the fixed switching frequency. The
LTC3621 has internal circuitry to accurately maintain the
peak current limit (I
LIM
) of 1.6A even at high duty cycles.
As the duty cycle approaches 100%, the LTC3621 enters
dropout operation. During dropout, if force continuous
mode is selected, the top PMOS switch is turned on
continuously, and all active circuitry is kept alive. How
-
ever, if Burst Mode operation or pulse-skipping mode is
LTC3621/LTC3621-2
9
3621fc
For more information www.linear.com/LTC3621
operaTion
selected, the part will transition in and out of sleep mode
depending on the output load current. This significantly
reduces the quiescent current, thus prolonging the use
of the input supply.
V
IN
Overvoltage Protection
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTC3621 constantly
monitors the V
IN
pin for an overvoltage condition. When
V
IN
rises above 19V, the regulator suspends operation by
shutting off both power MOSFETs. Once V
IN
drops below
18.7V, the regulator immediately resumes normal opera-
tion. The regulator executes its soft-start function when
exiting an over
voltage condition.
Output V
oltage Programming
For non-fixed output voltage parts, the output voltage is
set by external resistive divider according to the following
equation:
V
OUT
= 0.6V 1+
R2
R1
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
I
RMS
I
OUT(MAX)
V
OUT
V
IN
V
IN
V
OUT
1
This formula has a maximum at V
IN
= 2V
OUT
, where:
I
RMS
I
OUT
2
This simple worst-case condition is commonly used for
design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based on only 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. For low input
voltage applications, sufficient bulk input capacitance is
needed to minimize transient effects during output load
changes.
Output Capacitor (C
OUT
) Selection
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
Low Supply Operation
The LTC3621 incorporates an undervoltage lockout circuit
which shuts down the part when the input voltage drops
below 2.7V. As the input voltage rises slightly above the
undervoltage threshold, the switcher will begin its basic
operation. However, the R
DS(ON)
of the top and bottom
switch will be slightly higher than that specified in the
electrical characteristics due to lack of gate drive. Refer
to graph of R
DS(ON)
versus V
IN
for more details.
Soft-Start
The LTC3621 has an internal 800µs soft-start ramp. During
start-up soft-start operation, the switcher will operate in
pulse-skipping mode.
applicaTions inForMaTion
V
OUT
R2
R1
3621 F01
C
FF
LTC3621
SGND
FB
Figure 1. Setting the Output Voltage
Input Capacitor (C
IN
) Selection
The input capacitance, C
IN
, is needed to filter the square
wave current at the drain of the top power MOSFET. To
prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current
should be used. The maximum RMS current is given by:

LTC3621HMS8E-23.3#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 17V, 1A, 1MHz Synchronous Step-Down Regulator with Ultralow Quiescent Current
Lifecycle:
New from this manufacturer.
Delivery:
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