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11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
10.17.3 PIO Controller C Multiplexing
Note: 1. USART2 only on SAM3SD8 in 100 pin package.
Table 10-6. Multiplexing on PIO Controller C (PIOC)
I/O Line Peripheral A Peripheral B Peripheral C
Extra
Function
System
Function Comments
PC0 D0 PWML0 100 pin version
PC1 D1 PWML1 100 pin version
PC2 D2 PWML2 100 pin version
PC3 D3 PWML3 100 pin version
PC4 D4 NPCS1 100 pin version
PC5 D5 100 pin version
PC6 D6 100 pin version
PC7 D7 100 pin version
PC8 NWE 100 pin version
PC9 NANDOE RXD2
(1)
100 pin version
PC10 NANDWE TXD2
(1)
100 pin version
PC11 NRD 100 pin version
PC12 NCS3 AD12 100 pin version
PC13 NWAIT PWML0 AD10 100 pin version
PC14 NCS0 SCK2
(1)
100 pin version
PC15 NCS1 PWML1 AD11 100 pin version
PC16 A21/NANDALE RTS2
(1)
100 pin version
PC17 A22/NANDCLE CTS2
(1)
100 pin version
PC18 A0 PWMH0 100 pin version
PC19 A1 PWMH1 100 pin version
PC20 A2 PWMH2 100 pin version
PC21 A3 PWMH3 100 pin version
PC22 A4 PWML3 100 pin version
PC23 A5 TIOA3 100 pin version
PC24 A6 TIOB3 100 pin version
PC25 A7 TCLK3 100 pin version
PC26 A8 TIOA4 100 pin version
PC27 A9 TIOB4 100 pin version
PC28 A10 TCLK4 100 pin version
PC29 A11 TIOA5 AD13 100 pin version
PC30 A12 TIOB5 AD14 100 pin version
PC31 A13 TCLK5 100 pin version
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11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
11. Embedded Peripherals Overview
11.1 Serial Peripheral Interface (SPI)
Supports communication with serial external devices
Four chip selects with external decoder support allow communication with up to 15
peripherals
Serial memories, such as DataFlash
®
and 3-wire EEPROMs
Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
Sensors
External co-processors
Master or slave serial peripheral bus interface
8- to 16-bit programmable data length per chip select
Programmable phase and polarity per chip select
Programmable transfer delays between consecutive transfers and between clock
and data per chip select
Programmable delay between consecutive transfers
Selectable mode fault detection
Connection to PDC channel capabilities optimizes data transfers
One channel for the receiver, one channel for the transmitter
Next buffer support
11.2 Two Wire Interface (TWI)
Master, Multi-Master and Slave Mode Operation
Compatibility with Atmel two-wire interface, serial memory and I
2
C compatible devices
One, two or three bytes for slave address
Sequential read/write operations
Bit Rate: Up to 400 kbit/s
General Call Supported in Slave Mode
Connecting to PDC channel capabilities optimizes data transfers in Master Mode only
One channel for the receiver, one channel for the transmitter
Next buffer support
11.3 Universal Asynchronous Receiver Transceiver (UART)
Two-pin UART
Independent receiver and transmitter with a common programmable Baud Rate
Generator
Even, Odd, Mark or Space Parity Generation
Parity, Framing and Overrun Error Detection
Automatic Echo, Local Loopback and Remote Loopback Channel Modes
Support for two PDC channels with connection to receiver and transmitter
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11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
11.4 USART
Programmable Baud Rate Generator
5- to 9-bit full-duplex synchronous or asynchronous serial communications
1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
Parity generation and error detection
Framing error detection, overrun error detection
MSB- or LSB-first
Optional break generation and detection
By 8 or by-16 over-sampling receiver frequency
Hardware handshaking RTS-CTS
Receiver time-out and transmitter timeguard
Optional Multi-drop Mode with address generation and detection
Optional Manchester Encoding
Full modem line support on USART1 (DCD-DSR-DTR-RI)
RS485 with driver control signal
ISO7816, T=0orT=1Protocols for interfacing with smart cards
NACK handling, error counter with repetition and iteration limit
SPI Mode
Master or Slave
Serial Clock programmable Phase and Polarity
SPI Serial Clock (SCK) Frequency up to MCK/4
IrDA modulation and demodulation
Communication at up to 115.2 Kbps
Test Modes
Remote Loopback, Local Loopback, Automatic Echo
11.5 Synchronous Serial Controller (SSC)
Provides serial synchronous communication links used in audio and telecom applications
(with CODECs in Master or Slave Modes, I
2
S, TDM Buses, Magnetic Card Reader)
Contains an independent receiver and transmitter and a common clock divider
Offers configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection of
different event on the frame sync signal
Receiver and transmitter include a data signal, a clock signal and a frame synchronization
signal
11.6 Timer Counter (TC)
Six 16-bit Timer Counter Channels
Wide range of functions including:
Frequency Measurement
Event Counting

ATSAM3SD8BA-AU

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
ARM Microcontrollers - MCU LQFP,Grn, IT, MRL A
Lifecycle:
New from this manufacturer.
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