1. General description
The GTL2007 is a customized translator between dual Xeon processors, Platform Health
Management, South Bridge and Power Supply LVTTL and GTL signals.
The GTL2007 is derived from the GTL2006 with an enable function added that disables
the error output to the monitoring agent for platforms that monitor the individual error
conditions from each processor. This enable function can be used so that false error
conditions are not passed to the monitoring agent when the system is unexpectedly
powered down. This unexpected power-down could be from a power supply overload, a
CPU thermal trip, or some other event of which the monitoring agent is unaware.
A typical implementation would be to connect each enable line to the system power good
signal or the individual enables to the VRD power good for each processor.
Typically Xeon processors specify a V
TT
of 1.1 V to 1.2 V, as well as a nominal V
ref
of
0.73 V to 0.76 V. To allow for future voltage level changes that may extend V
ref
to 0.63 of
V
TT
(minimum of 0.693 V with V
TT
of 1.1 V) the GTL2007 allows a minimum V
ref
of 0.66 V.
Characterization results show that there is little DC or AC performance variation between
these V
ref
levels.
2. Features
n Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver
n Operates at GTL−/GTL/GTL+ signal levels
n EN1 and EN2 disable error output
n 3.0 V to 3.6 V operation
n LVTTL I/O not 5 V tolerant
n Series termination on the LVTTL outputs of 30 Ω
n ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 500 mA
n Package offered: TSSOP28
GTL2007
12-bit GTL to LVTTL translator with power good control
Rev. 02 — 16 February 2007 Product data sheet
