REVISION B 8/25/15
873991-147 DATA SHEET
14 LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL
CLOCK GENERATOR
TABLE 7. THERMAL RESISTANCE θ
JA
FOR 52-PIN LQFP FORCED CONVECTION
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the 873991-147.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 873991-147 is the sum of the core power plus the analog power plus the power dissipated in the
load(s). The following is the power dissipation for V
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)
MAX
= V
CC_MAX
* (I
CC_MAX
+ I
CCA_MAX
+ I
CCO_MAX
) = 3.465V * (150mA + 15mA + 95mA) = 900.9mW
• Power (outputs)
MAX
= 30mW/Loaded Output pair
If all outputs are loaded, the total power is 14 * 30mW = 420mW
Total Power
_MAX
(3.465V, with all outputs switching) = 900.9mW + 420mW = 1.3209W
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125°C.
The equation for Tj is as follows: Tj = θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
JA
must be used. Assuming no air fl ow
and a multi-layer board, the appropriate value is 55.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 50°C with all outputs switching is:
50°C + 1.32W * 55.5°C/W = 123.3°C. This is at the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air fl ow,
and the type of board (multi-layer).
θ
JA
by Velocity (Meters per Second)
0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 55.5°C/W 50.1°C/W 47.0°C/W
