LTC2906/LTC2907
10
29067f
Threshold Accuracy
Reset threshold accuracy is of the utmost importance in a
supply sensitive system. Ideally such a system should not
reset while supply voltages are within a specified margin
below the rated nominal level. Both of the LTC2906/
LTC2907 inputs have the same relative threshold accu-
racy. The specification for LTC2906/LTC2907 is ±1.5% of
the programmed nominal input voltage (over the full
operating temperature range).
For example, when the LTC2906/LTC2907 are programmed
to handle a 5V input with 10% tolerance (S1 = V1 and TOL
= GND, refer to Table 1 and Table 3), it does not issue a
reset command when V1 is above 4.5V. The typical 10%
trip threshold is at 11.5% below the nominal input voltage
level. Therefore, the typical trip threshold for the 5V input
is 4.425V. With ±1.5% accuracy, the trip threshold range
is 4.425V ±75mV over temperature (i.e. 10% to 13%
below 5V). This implies that the monitored system must
operate reliably down to 4.35V or 13% below 5V over
temperature.
The same system using a supervisor with only ±2.5%
accuracy needs to work reliably down to 4.25V (4.375V
±125mV) or 15% below 5V, requiring the monitored
system to work over a much wider operating voltage
range.
In any supervisory application, supply noise riding on the
monitored DC voltage can cause spurious resets, particu-
larly when the monitored voltage is near the reset thresh-
old. A less desirable but common solution to this problem
is to introduce hysteresis around the nominal threshold.
Notice however, this hysteresis introduces an error term
in the threshold accuracy. Therefore, a ±2.5% accurate
monitor with ±1% hysteresis is equivalent to a ±3.5%
monitor with no hysteresis.
The LTC2906/LTC2907 take a different approach to solve
this problem of supply noise causing spurious reset. The
first line of defense against this spurious reset is a first
order low pass filter at the output of the comparator. Thus,
the comparator output goes through a form of integration
before triggering the output logic. Therefore, any kind of
transient at the input of the comparator needs to be of
sufficient magnitude and duration before it can trigger a
change in the output logic.
The second line of defense is the programmed delay time
t
RST
(200ms for LTC2906 and adjustable using an external
capacitor for LTC2907). This delay will eliminate the effect
of any supply noise, whose frequency is above 1/ t
RST
, on
the RST and RST output.
When either V1 or V
ADJ
drops below its programmed
threshold, the RST pin asserts low (RST weakly pulls
high). When the supply recovers above the programmed
threshold, the reset-pulse-generator timer starts
counting.
If the supply remains above the programmed threshold
when the timer finishes counting, the RST pin weakly pulls
high (RST asserts low). However, if the supply falls below
the programmed threshold any time during the period
when the timer is still counting, the timer resets and starts
fresh when the supply next rises above the programmed
threshold.
Note that this second line of defense is only effective for a
rising supply and does not affect the sensitivity of the
system to a falling supply. Therefore, the first line of
defense that works for both cases of rising and falling is
necessary. These two approaches prevent spurious reset
caused by supply noise without sacrificing the threshold
accuracy.
Selecting the Reset Timing Capacitor
The reset time-out period for LTC2907 is adjustable in
order to accommodate a variety of microprocessor appli-
cations. Connecting a capacitor, C
TMR
, between the TMR
pin and ground sets the reset time-out period, t
RST
. The
following formula determines the value of capacitor needed
for a particular reset time-out period:
C
TMR
= t
RST
• 110 • 10
–9
[F/s]
For example, using a standard capacitor value of 22nF
gives a 200ms delay.
The graph in Figure 2 shows the desired delay time as a
function of the value of the timer capacitor that should be
used:
APPLICATIO S I FOR ATIO
WUUU
