LTC2906/LTC2907
7
29067f
BLOCK DIAGRA
W
+
+
200ms
RESET PULSE
GENERATOR
THREE-STATE DECODER
RESISTOR
NETWORK
POWER
DETECT
BAND GAP
REFERENCE
V
MAX
V
MAX
LTC2906
2906 BD
S1 TOL
RST
RST
V
MAX
GND
V1
V
ADJ
V
CC
6µA
6µA
+
+
200ms
RESET PULSE
GENERATOR
THREE-STATE DECODER
RESISTOR
NETWORK
POWER
DETECT
BAND GAP
REFERENCE
V
MAX
V
MAX
LTC2907
2907 BD
S1 TOL
TMR
RST
GND
V1
V
CC
V
ADJ
6µA
LTC2906/LTC2907
8
29067f
APPLICATIO S I FOR ATIO
WUU
U
Supply Monitoring
The LTC2906/LTC2907 are low power, high accuracy dual
supply monitoring circuits with an adjustable input and
another input with selectable threshold. Reset delay is set
to a nominal of 200ms for LTC2906 and is adjustable using
an external capacitor for LTC2907.
The three-state input pin (S1) selects one of three possible
threshold voltage levels for V1. Another three-state input
pin sets the supply tolerance (5%, 7.5% or 10%). Both
input voltages (V1 and V
ADJ
) must be above predeter-
mined thresholds for the reset not to be invoked. The
LTC2906/LTC2907 assert the reset outputs during power-
up, power-down and brownout conditions on any one of
the voltage inputs.
Power-Up
The greater of V1, V
CC
is the internal supply voltage
(V
MAX
). V
MAX
powers the drive circuits for the RST pin.
Therefore, as soon as V1 or V
CC
reaches 1V during power
up, the RST output asserts low.
V
MAX
also powers the drive circuits for the RST pin in the
LTC2906. Therefore, RST weakly pulls high when either
V1 or V
CC
reaches at least 1V.
Threshold programming is complete, when V1 reaches at
least 2.17V. After programming, if any one of the Vx inputs
TI I G DIAGRA
UWW
V
X
RST
RST
t
UV
t
RST
1V
1V
V
RTX
29067 TD
Vx Monitor Timing
falls below its programmed threshold, RST asserts low
(RST weakly pulls high) as long as V
MAX
is at least 1V.
Once both V1 and V
ADJ
inputs rise above their thresholds,
an internal timer is started. After the programmed delay
time, RST weakly pulls high (RST asserts low).
Power-Down
On power-down, once either V1 or V
ADJ
drops below its
threshold, RST asserts logic low and RST weakly pulls
high. V
MAX
of at least 1V guarantees a logic low of 0.4V
at RST.
Auxiliary Power
If an auxiliary power is available it can be connected to the
V
CC
pin. Since the internal supply voltage (V
MAX
) is the
greater of V1, V
CC
; a V
CC
of at least 1V guarantees logic low
of 0.4V at RST for voltage inputs (V1 and/or V
ADJ
) down
to 0V.
Programming Pins
The two three-state input pins, S1 and TOL, should be
connected to GND, V1 or left unconnected during normal
operation. Note that when left unconnected, the maximum
leakage current allowable from the pin to either GND or V1
is 10µA.
LTC2906/LTC2907
9
29067f
In margining application, the three-state input pins can be
driven using a three-state buffer. Note however, the low
and high output of the three-state buffer has to satisfy the
V
IL
and V
IH
of the three-state pin listed in the Electrical
Characteristics Table. Moreover, when the three-state
buffer is in the high impedance state, the maximum
leakage current allowed from the pin to either GND or V1
is 10µA.
Monitor Programming
Connecting S1 to either GND, or V1, or leaving it in open
state selects the LTC2906/LTC2907 V1 input voltage
threshold. Table 1 shows the three possible selections of
V1 nominal input voltage and their corresponding S1
connection.
The noninverting input on the V
ADJ
comparator is set
to 0.5V when the TOL pin is set high (5% tolerance)
(Figure␣ 1) and the high impedance inverting input directly
ties to the V
ADJ
pin.
Table 1. Supply Selection Programming
V1 S1
5.0 V1
3.3 OPEN
2.5 GND
Note: Open = open circuit or driven by a three-state buffer
in high impedance state with leakage current less than 10µA.
R2 =100k is recommended. Once the resistor divider is
set in the 5% tolerance mode, there is no need to change
the divider for the other tolerance modes (7.5%, 10%)
because the internal reference at the noninverting input on
the V
ADJ
comparator is scaled accordingly, moving the trip
point in 2.5% decrements.
Table 2 shows suggested 1% resistor values for various
adjustable applications.
Table 2. Suggested 1% Resistor Values for the V
ADJ
Inputs
V
SUPPLY
(V) V
TRIP
(V) R1 (k) R2 (k)
12 11.25 2150 100
10 9.4 1780 100
8 7.5 1400 100
7.5 7 1300 100
6 5.6 1020 100
5 4.725 845 100
3.3 3.055 511 100
3 2.82 464 100
2.5 2.325 365 100
1.8 1.685 237 100
1.5 1.410 182 100
1.2 1.120 124 100
1 0.933 86.6 100
0.9 0.840 68.1 100
0.8 0.750 49.9 100
0.7 0.655 30.9 100
0.6 0.561 12.1 100
Tolerance Programming
The three-state input pin TOL, programs the common
supply tolerance for both V1 and V
ADJ
input voltages (5%,
7.5% or 10%). The larger the tolerance the lower the trip
threshold. Table 3 shows the tolerances selection corre-
sponding to a particular connection at the TOL pin.
+
+
0.5V
LTC2906/LTC2907
R1
1%
R2
1%
V
TRIP
V
ADJ
29067 F01
Figure 1. Setting the Adjustable Trip Point
In a typical application, the V
ADJ
pin connects to a tap point
on an external resistive divider between the positive volt-
age being monitored and ground. The following formula
obtains R1 resistor value for a particular value of R2 and
a desired trip voltage at 5% tolerance:
R
V
V
R
TRIP
1
05
12
5
=
(%)
.
APPLICATIO S I FOR ATIO
WUUU
Table 3. Tolerance Programming
TOLERANCE TOL
5% V1
7.5% OPEN
10% GND

LTC2907IDDB#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits Prec 2x S Mon s w/ One Pin-Sel Threshold
Lifecycle:
New from this manufacturer.
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