DS2436
13 of 29
VOLTAGE/DATA RELATIONSHIP Table 2
TEMPERATURE DIGITAL OUTPUT (Binary) DIGITAL OUTPUT (Hex)
0.010V 0000 0000 0000 0001 0001
2.4V 0000 0001 1111 0000 00F0
3.6V 0000 0001 0110 1000 0168
5V 0000 0001 1111 0100 01F4
7.2V 0000 0010 1101 0000 02D0
9.99V 0000 0011 1110 0111 03E7
10V 0000 0011 1110 1000 03E8
PAGE 5
The fifth page of memory holds the Manufacturer ID number, as well as a 2-byte counter for counting the
number of battery charge/discharge cycles.
MANUFACTURER ID REGISTER (80h and 81h)
The Manufacturer ID Register is a 16-bit laser ROM register that can contain a unique identification code
if purchased from Dallas Semiconductor. This ID number is programmed by Dallas Semiconductor, is
unchangeable, and is unique to each customer. This ID number may be used to assure that batteries
containing a DS2436 have the same manufacturer ID number as a charger configured to operate with that
battery pack. This feature may be used to prevent charging of batteries for which the charging circuit has
not been designed.
CYCLE COUNTER (82h and 83h)
The Cycle Counter gives an indication of the number of charge/discharge cycles the battery pack has
been through. This nonvolatile register is incremented by the user through the use of a protocol to the
DS2436 and is reset by another protocol. The counter is a straight binary counter, formatted as follows:
CYCLE COUNTER
MSB
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
82h
2
15
2
14
2
13
2
12
2
11
2
10
2
9
2
8
83h
The Cycle Counter does not roll over when it reaches its maximum value (FFFFh).
MEMORY FUNCTION COMMANDS 64-BIT LASERED ROM
Each DS2436 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code
(DS2436 code is 1Bh). The next 48 bits are a unique serial number. The last 8 bits are a Cyclic
Redundancy Check (CRC) of the first 56 bits. (See Figure 4.) The 64-bit ROM and ROM Function
Control section allow the DS2436 to operate as a 1-Wire device and follow the 1-Wire protocol detailed
in the section “1-Wire Bus System.”
The functions required to control sections of the DS2436 are not accessible until the ROM function
protocol has been satisfied. This protocol is described in the ROM Function Protocol Flow Chart (Figure
5). The 1-Wire bus master must first provide one of four ROM function commands: 1) Read ROM, 2)
Match ROM, 3) Search ROM, or 4) Skip ROM. After a ROM function sequence has been successfully
executed, the functions specific to the DS2436 are accessible. The bus master may then provide one of
the 15 memory and control function commands.
