DS28EA00U+ Datasheet DS28EA00U+ | P10-P12

The power-on default chain state is OFF, where PIOA

and PIOB are solely controlled through the PIO Access

Read and Write commands. In the chain ON state,

PIOA is pulled high to the device’s internal V

supply

through an approximately 40kΩ resistor, applying a

logic 1 to the PIOB (EN) pin of the next device. Only in

the ON state does a DS28EA00 respond to the

Conditional Read ROM command, provided its EN is at

logic 0. After a device’s ROM registration number is

read, it is put into the chain DONE state, which enables

the next device in the chain to respond to the

Conditional Read ROM command.

At the beginning of the sequence discovery process, all

devices are put into the chain ON state. As the discov-

ery progresses, one device after another is transitioned

into the DONE state until all devices are identified.

Finally, all devices are put into the chain OFF state,

which releases the PIO pins and restores their power-

on default state.

Control Function Commands

Figure 9 shows the protocols necessary for measuring

temperatures, accessing the memory and PIO pins,

and changing the chain state. Examples on how to use

these and other functions are included at the end of this

document. The communication between master and

DS28EA00 takes place either at standard speed

(default, OD = 0) or at overdrive speed (OD = 1). If not

explicitly set into the overdrive mode after power-up,

the DS28EA00 communicates at standard speed.

Write Scratchpad [4Eh]

This command allows the master to write 3 bytes of

data to the scratchpad of the DS28EA00. The first data

byte is associated with the TH register (byte address

2), the second byte is associated with the TL register

(byte address 3), and the third byte is associated with

the Configuration register (byte address 4). Data must

be transmitted least significant bit first. All 3 bytes must

be written before the master issues a reset, or the data

can be corrupted.

Read Scratchpad [BEh]

This command allows the master to read the contents

of the scratchpad. The data transfer starts with the least

significant bit of the Temperature Readout register at

byte address 0 and continues through the remaining 7

bytes of the scratchpad. If the master continues read-

ing, it gets a ninth byte, which is an 8-bit CRC of all the

data in the scratchpad. This CRC is generated by the

DS28EA00 and uses the same polynomial function as is

used with the ROM registration number. The CRC is

transmitted in its true (noninverted) form. The master

can issue a reset to terminate the reading early if only

part of the scratchpad data is needed.

Copy Scratchpad [48h]

This command copies the contents of the scratchpad

byte addresses 2 to 4 (TH, TL, and Configuration regis-

ters) to the backup EEPROM. If the device has no V

power, the master must enable a strong pullup on the

1-Wire bus for the duration of t

PROGMAX

within 10µs

after this command is issued. If the device is powered

through the V

pin, the master can generate read time

slots to monitor the copy process. Copy is completed

when the master reads 1 bits instead of 0 bits.

Convert Temperature [44h]

This command initiates a temperature conversion.

Following the conversion, the resulting thermal data is

found in the Temperature Readout register in the

scratchpad and the DS28EA00 returns to its low-power

idle state. If the device has no V

power, the master

must enable a strong pullup on the 1-Wire bus for the

duration of the applicable resolution-dependent

CONVMAX

within 10µs after this command is issued. If

the device is powered through the V

pin, the master

can generate read time slots to monitor the conversion

process. The conversion is completed when the master

reads 1 bits instead of 0 bits.

Read Power Mode [B4h]

For Copy Scratchpad and Convert Temperature, the

master needs to know whether the DS28EA00 has V

power available. The Read Power Mode command is

implemented to provide the master with this informa-

tion. After the command code, master issues read time

slots. If the master reads 1s, the device is powered

through the V

pin. If the device is powered through

the 1-Wire line, the master read 0s. The power-supply

sensor samples the state of the V

pin for every time

slot that the master generates after the command code.

Recall EEPROM [B8h]

This command recalls the TH and TL alarm trigger val-

ues and configuration data from backup EEPROM into

their respective locations in the scratchpad. After hav-

ing transmitted the command code, the master can

issue read time slots to monitor the completion of the

recall process. Recall is completed when the master

reads 1 bits instead of 0 bits. The recall occurs auto-

matically at power-up, not requiring any activity by the

master.

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA00

10 Maxim Integrated

PIO Access Read [F5h]

This command reads the PIO logical status and reports

it together with the state of the PIO output latch in an

endless loop. A PIO Access Read can be terminated at

any time with a 1-Wire reset. PIO Access Read can be

executed in the Chain ON and Chain DONE state.

While the device is in the Chain ON or Chain DONE

state, the PIO output latch states always read out as 1s;

the PIO pin state may not be reported correctly.

The state of both PIO channels is sampled at the same

time. The first sampling occurs during the last (most

significant) bit of the command code F5h. The PIO sta-

tus is then reported to the bus master. While the master

receives the last (most significant) bit of the PIO status

byte, the next sampling occurs and so on until the mas-

ter generates a 1-Wire reset. The sampling occurs with

a delay of t

REH

+ x from the rising edge of the MS bit of

the previous byte, as shown in Figure 6. The value of

“x” is approximately 0.2µs.

PIO Access Write [A5h]

The PIO Access Write command writes to the PIO out-

put latches, which control the pulldown transistors of

the PIO channels. In an endless loop, this command

first writes new data to the PIO and then reads back the

PIO status. This implicit read-after-write can be used by

the master for status verification. A PIO Access Write

can be terminated at any time with a 1-Wire reset. The

PIO Access Write command is ignored by the device

while in Chain ON or Chain DONE state.

After the command code, the master transmits a PIO

output data byte that determines the new state of the

PIO output transistors. The first (least significant) bit is

associated to PIOA; the next bit affects PIOB. The other

6 bits of the new state byte do not have corresponding

PIO pins. These bits should always be transmitted as 1s.

To switch the output transistor on, the corresponding bit

value is 0. To switch the output transistor off (non-con-

ducting), the bit must be 1. This way the bit transmitted

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA00

Maxim Integrated 11

PIO Status Bit Assignment

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

COMPLEMENT OF B3 TO B0

PIOB OUTPUT

LATCH STATE

PIOB PIN

STATE

PIOA OUTPUT

LATCH STATE

PIOA PIN

STATE

PIO Output Data Bit Assignment

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

X X X X X X PIOB PIOA

SAMPLING POINT**

REH

+ X

*THE "PREVIOUS BYTE" COULD BE THE COMMAND CODE OR THE DATA BYTE RESULTING FROM THE PREVIOUS PIO SAMPLE.

**THE SAMPLE POINT TIMING ALSO APPLIES TO THE PIO ACCESS WRITE COMMAND, WITH THE "PREVIOUS BYTE" BEING THE WRITE CONFIRMATION BYTE (AAh).

MOST SIGNIFICANT 2 BITS OF PREVIOUS BYTE* LEAST SIGNIFICANT 2 BITS OF PIO STATUS BYTE

Figure 6. PIO Access Read Timing Diagram

as the new PIO output state arrives in its true form at the

PIO pin. To protect the transmission against data errors,

the master must repeat the PIO output data byte in its

inverted form. Only if the transmission was error-free can

the PIO status change. The actual PIO transition to the

new state occurs with a delay of t

REH

+ x from the rising

edge of the MS bit of the inverted PIO byte, as shown in

Figure 7. The value of “x” is approximately 0.2µs. To

inform the master about the successful communication

of the PIO byte, the DS28EA00 transmits a confirmation

byte with the data pattern AAh. While the MS bit of the

confirmation byte is transmitted, the DS28EA00 samples

the state of the PIO pins, as shown in Figure 6, and

sends it to the master. The master can either continue

writing more data to the PIO or issue a 1-Wire reset to

end the command.

Chain [99h]

This command allows the master to put the DS28EA00

into one of the three chain states, as shown in Figure 8.

The device powers up in the chain OFF state. To transi-

tion a DS28EA00 from one state to another, the master

must send a suitable chain control byte after the Chain

command code. Only the codes 3Ch, 5Ah, and 96h

(true form) are valid, assigned to OFF, ON, and DONE,

in this sequence. This control byte is first transmitted in

its true form and then in its inverted form. If the chain

state change was successful, the master receives AAh

confirmation bytes. If the change was not successful

(control byte transmission error, invalid control byte),

the master reads 00h bytes instead.

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA00

12 Maxim Integrated

REH

+ X

PIO

MOST SIGNIFICANT 2 BITS OF INVERTED PIO OUTPUT DATA BYTE LEAST SIGNIFICANT 2 BITS OF CONFIRMATION BYTE (AAh)

Figure 7. PIO Access Write Timing Diagram

THESE TRANSITIONS ARE PERMISSIBLE, BUT DO NOT

OCCUR DURING NORMAL OPERATION.

OFFPOWER-ON RESET (POR)

CHAIN DONE

CHAIN ON

CHAIN DONE

CHAIN OFF

OR POR

DONEON

Figure 8. Chain State Transition Diagram

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P29

DS28EA00U+

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Description:

Board Mount Temperature Sensors 1-Wire Digital Therm w/Sequence Dtct-PIO

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