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EVAL-AVB-LISTENER

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
Data Sheet ADV7612
Rev. E | Page 15 of 20
Table 7. DDR 4:2:2 Output Modes
DDR 4:2:2 Mode (Clock/2)
OP_FORMAT_SEL[7:0] 0x20 0x21 0x22
8-Bit DDR ITU-656
(Clock/2 Output) 4:2:2 Mode 0
10-Bit DDR ITU-656
(Clock/2 Output) 4:2:2 Mode 0
12-Bit DDR ITU-656
(Clock/2 Output) 4:2:2 Mode 0
Pixel Output Clock Rise Clock Fall Clock Rise Clock Fall Clock Rise Clock Fall
P35 High-Z High-Z High-Z High-Z High-Z High-Z
P34 High-Z High-Z High-Z High-Z High-Z High-Z
P33 High-Z High-Z High-Z High-Z High-Z High-Z
P32 High-Z High-Z High-Z High-Z High-Z High-Z
P31 High-Z High-Z High-Z High-Z High-Z High-Z
P30
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
P29 High-Z High-Z High-Z High-Z High-Z High-Z
P28 High-Z High-Z High-Z High-Z High-Z High-Z
P27 High-Z High-Z High-Z High-Z High-Z High-Z
P26 High-Z High-Z High-Z High-Z High-Z High-Z
P25 High-Z High-Z High-Z High-Z High-Z High-Z
P24 High-Z High-Z High-Z High-Z High-Z High-Z
P23 Cb7, Cr7
Y7
Cb9, Cr9
Y9
Cb11, Cr11
Y11
P22 Cb6, Cr6
Y6
Cb8, Cr8
Y8
Cb10, Cr10
Y10
P21 Cb5, Cr5
Y5
Cb7, Cr7
Y7
Cb9, Cr9
Y9
P20 Cb4, Cr4
Y4
Cb6, Cr6
Y6
Cb8, Cr8
Y8
P19
Cb3, Cr3
Y3
Cb5, Cr5
Y5
Cb7, Cr7
Y7
P18 Cb2, Cr2
Y2
Cb4, Cr4
Y4
Cb6, Cr6
Y6
P17 Cb1, Cr1
Y1
Cb3, Cr3
Y3
Cb5, Cr5
Y5
P16 Cb0, Cr0
Y0
Cb2, Cr2
Y2
Cb4, Cr4
Y4
P15 High-Z High-Z Cb1, Cr1
Y1
Cb3, Cr3
Y3
P14 High-Z High-Z Cb0, Cr0
Y0
Cb2, Cr2
Y2
P13 High-Z High-Z High-Z High-Z Cb1, Cr1
Y1
P12 High-Z High-Z High-Z High-Z Cb0, Cr0
Y0
P11 High-Z High-Z High-Z High-Z High-Z High-Z
P10 High-Z High-Z High-Z High-Z High-Z High-Z
P9 High-Z High-Z High-Z High-Z High-Z High-Z
P8
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
P7 High-Z High-Z High-Z High-Z High-Z High-Z
P6 High-Z High-Z High-Z High-Z High-Z High-Z
P5 High-Z High-Z High-Z High-Z High-Z High-Z
P4 High-Z High-Z High-Z High-Z High-Z High-Z
P3 High-Z High-Z High-Z High-Z High-Z High-Z
P2 High-Z High-Z High-Z High-Z High-Z High-Z
P1 High-Z High-Z High-Z High-Z High-Z High-Z
P0 High-Z High-Z High-Z High-Z High-Z High-Z
ADV7612 Data Sheet
Rev. E | Page 16 of 20
Table 8. DDR 4:4:4 Output Modes
DDR 4:4:4 Mode (Clock/2)
1, 2
OP_FORMAT_SEL[7:0] 0x60 0x61 0x62
24-Bit DDR RGB (Clock/2 Output) 30-Bit DDR RGB (Clock/2 Output) 36-Bit DDR RGB (Clock/2 Output)
Pixel Output Clock Rise Clock Fall Clock Rise Clock Fall Clock Rise Clock Fall
P35 R7-0 R7-1 R9-0 R9-1 R11-0 R11-1
P34 R6-0 R6-1 R8-0 R8-1 R10-0 R10-1
P33 R5-0 R5-1 R7-0 R7-1 R9-0 R9-1
P32 R4-0 R4-1 R6-0 R6-1 R8-0 R8-1
P31
R3-0
R3-1
R5-0
R5-1
R7-0
R7-1
P30 R2-0 R2-1 R4-0 R4-1 R6-0 R6-1
P29 R1-0 R1-1 R3-0 R3-1 R5-0 R5-1
P28 R0-0 R0-1 R2-0 R2-1 R4-0 R4-1
P27 High-Z High-Z R1-0 R1-1 R3-0 R3-1
P26 High-Z High-Z R0-0 R0-1 R2-0 R2-1
P25 High-Z High-Z High-Z High-Z R1-0 R1-1
P24 High-Z High-Z High-Z High-Z R0-0 R0-1
P23 G7-0 G7-1 G9-0 G9-1 G11-0 G11-1
P22 G6-0 G6-1 G8-0 G8-1 G10-0 G10-1
P21 G5-0 G5-1 G7-0 G7-1 G9-0 G9-1
P20 G4-0 G4-1 G6-0 G6-1 G8-0 G8-1
P19 G3-0 G3-1 G5-0 G5-1 G7-0 G7-1
P18 G2-0 G2-1 G4-0 G4-1 G6-0 G6-1
P17 G1-0 G1-1 G3-0 G3-1 G5-0 G5-1
P16 G0-0 G0-1 G2-0 G2-1 G4-0 G4-1
P15 High-Z High-Z G1-0 G1-1 G3-0 G3-1
P14 High-Z High-Z G0-0 G0-1 G2-0 G2-1
P13 High-Z High-Z High-Z High-Z G1-0 G1-1
P12 High-Z High-Z High-Z High-Z G0-0 G0-1
P11 B7-0 B7-1 B9-0 B9-1 B11-0 B11-1
P10 B6-0 B6-1 B8-0 B8-1 B10-0 B10-1
P9 B5-0 B5-1 B7-0 B7-1 B9-0 B9-1
P8 B4-0 B4-1 B6-0 B6-1 B8-0 B8-1
P7 B3-0 B3-1 B5-0 B5-1 B7-0 B7-1
P6 B2-0 B2-1 B4-0 B4-1 B6-0 B6-1
P5 B1-0 B1-1 B3-0 B3-1 B5-0 B5-1
P4 B0-0 B0-1 B2-0 B2-1 B4-0 B4-1
P3 High-Z High-Z B1-0 B1-1 B3-0 B3-1
P2 High-Z High-Z B0-0 B0-1 B2-0 B2-1
P1 High-Z High-Z High-Z High-Z B1-0 B1-1
P0 High-Z High-Z High-Z High-Z B0-0 B0-1
1
-0 = even samples.
2
-1 = odd samples.
Data Sheet ADV7612
Rev. E | Page 17 of 20
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-026-BED-HD
TOP VIEW
(PINS DOWN)
BOTTOM VIEW
(PINS UP)
EXPOSED
PAD
1
1
25
25
26
26
50
50
76 76100 100
75 75
51
51
0.27
0.22
0.17
0.50
BSC
LEAD PITCH
PIN 1
16.20
16.00 SQ
15.80
14.20
14.00 SQ
13.80
6.00 REF
SQ
12.00 BSC
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
06-22-2011-A
0.15
0.05
0.08
COPLANARITY
7°
0°
0.20
0.09
VIEW A
ROTATED 90° CCW
1.45
1.40
1.35
VIEW A
1.60
MAX
SEATING
PLANE
0.75
0.60
0.45
1.00 REF
Figure 8. 100-Lead Low Profile Quad Flat Package [LQFP_EP]
SW-100-2
Dimensions shown in millimeters
ORDERING GUIDE
Model
1, 2, 3
Temperature Range Package Description Package Option
ADV7612BSWZ −40°C to +85°C 100-Lead LQFP_EP SW-100-2
ADV7612BSWZ-P
−40°C to +85°C
100-Lead LQFP_EP
SW-100-2
ADV7612WBSWZ −40°C to +85°C 100-Lead LQFP_EP SW-100-2
EVAL-ADV7612EB1Z Evaluation board with HDCP keys
EVAL-ADV7612EB2Z Evaluation board without HDCP keys
EVAL-ADV7612-7511 Low cost evaluation board with HDCP
EVAL-ADV7612-7511P Low cost evaluation board without HDCP
1
Z = RoHS Compliant Part.
2
The ADV7612BSWZ-P is a non-HDCP version.
3
W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADV7612WBSWZ model is available with controlled manufacturing to support the quality and reliability requirements of
automotive applications. Note that this automotive model may have specifications that differ from the commercial models; therefore,
designers should review the Specifications section of this data sheet carefully. Only the automotive grade product shown is available for
use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and
to obtain the specific Automotive Reliability reports for this model.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

EVAL-AVB-LISTENER

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Manufacturer:
Analog Devices Inc.
Description:
Video IC Development Tools EVAL-AVB-LISTENER
Lifecycle:
New from this manufacturer.
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