SCALE™-2 2SC0535T2A1-33
Preliminary Data Sheet
www.power.com/igbt-driver Page 5
Output Voltage Remarks Min Typ Max Unit
Turn-on voltage, V
GHx
Any load condition 15.0 V
Turn-off voltage, V
GLx
No load -10.8 V
Turn-off voltage, V
GLx
5W output power -9 V
Turn-off voltage, V
GLx
7.5W output power -8.5 V
Footnotes to the Key Data
1) The maximum peak gate current refers to the highest current level occurring during the product
lifetime. It is an absolute value and does also apply for short pulses.
2) The average supply input current is limited for thermal reasons. Higher values than specified by the
absolute maximum rating are permissible (e.g. during power supply start up) if the average remains
below the given value, provided the average is taken over a time period which is shorter than the
thermal time constants of the driver in the application.
3) There is no means of actively controlling or limiting the input current in the driver. In the case of
start-up with very high blocking capacitor values, or in case of short circuit at the output, the supply
input current has to be limited externally.
4) The maximum output power must not be exceeded at any time during operation. The absolute
maximum rating must also be observed for time periods shorter than the thermal time constants of
the driver in the application.
5) An extended output power range is specified in the output power section for maximum ambient
temperatures of 70°C. In that case, the absolute maximum rating for the operating temperature
changes to (–40°C - 70°C) and the absolute maximum output power rating changes to 7.5W.
6) The delay time is measured between 50% of the input signal and 10% voltage swing of the
corresponding output. The delay time is independent on the output loading.
7) Output rise and fall times are measured between 10% and 90% of the nominal output swing with an
output load of 4.7Ω and 270nF. The values are given for the driver side of the gate resistors. The time
constant of the output load in conjunction with the present gate resistors leads to an additional delay
at the load side of the gate resistors.
8) External blocking capacitors should be placed between the VISOx and VEx as well as the VEx and
COMx terminals. Refer to “2SC0535T Description & Application Manual” (paragraph “DC/DC output
(VISOx), emitter (VEx) and COMx terminals)” for recommendations. Ceramic capacitors are
recommended.
9) The minimum response time is valid for the circuit given in the description and application manual
with the values of the corresponding tables.
10) The blocking time sets a minimum time span between the end of any secondary-side fault state and
the start of normal operation (remove fault from pin SOx). The value of the blocking time can be
adjusted at pin TB. The specified blocking time is valid if TB is connected to GND.
11) This specification guarantees that the drive information will be transferred reliably even at a high DC-
link voltage and with ultra-fast switching operations.
12) Undervoltage monitoring of the primary-side supply voltage (VCC to GND). If the voltage drops below
this limit, a fault is transmitted to both SOx outputs and the power semiconductors are switched off.
13) Undervoltage monitoring of the secondary-side supply voltage (VISOx to VEx and VEx to COMx which
correspond with the approximate turn-on and turn-off gate-emitter voltages). If the corresponding
voltage drops below this limit, the IGBT is switched off and a fault is transmitted to the corresponding
SOx output.
14) Transmission delay of fault state from the secondary side to the corresponding primary-side status
output.
15) HiPot testing (= dielectric testing) must generally be restricted to suitable components. This gate
driver is suited for HiPot testing. Nevertheless, it is strongly recommended to limit the testing time to
1s slots as stipulated by EN 50178. Excessive HiPot testing at voltages much higher than 2330V
AC(eff)
may lead to insulation degradation. No degradation has been observed over 1min. testing at
